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/trusted-firmware-m-3.4.0/platform/ext/target/arm/rss/common/native_drivers/
Datu_rss_drv.c133 enum atu_roba_t val, uint8_t region, uint8_t shift) in _set_bus_attribute() argument
137 if(region >= get_supported_region_count(dev)) in _set_bus_attribute()
140 p_atu->aturoba[region] = ((p_atu->aturoba[region] & ~(0x3u << shift)) | in _set_bus_attribute()
160 enum atu_error_t enable_atu_region(struct atu_dev_t* dev, uint8_t region) in enable_atu_region() argument
164 if(region >= get_supported_region_count(dev)) in enable_atu_region()
167 p_atu->atuc |= (1u << region); in enable_atu_region()
172 enum atu_error_t disable_atu_region(struct atu_dev_t* dev, uint8_t region) in disable_atu_region() argument
176 if(region >= get_supported_region_count(dev)) in disable_atu_region()
179 p_atu->atuc &= ~(1u << region); in disable_atu_region()
213 uint32_t address, uint8_t region) in set_start_logical_address() argument
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Datu_rss_drv.h98 enum atu_error_t enable_atu_region(struct atu_dev_t* dev, uint8_t region);
110 enum atu_error_t disable_atu_region(struct atu_dev_t* dev, uint8_t region);
164 uint32_t address, uint8_t region);
178 uint32_t address, uint8_t region);
192 uint64_t offset_address, uint8_t region);
206 enum atu_roba_t val, uint8_t region);
220 enum atu_roba_t val, uint8_t region);
234 enum atu_roba_t val, uint8_t region);
248 enum atu_roba_t val, uint8_t region);
262 enum atu_roba_t val, uint8_t region);
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/trusted-firmware-m-3.4.0/platform/ext/target/arm/rss/common/rss_comms/
Drss_comms_atu.c18 uint8_t region; member
31 uint8_t region) in comms_atu_add_region_to_set() argument
33 if (region >= RSS_COMMS_ATU_REGION_AM) { in comms_atu_add_region_to_set()
37 set->ref_counts[region]++; in comms_atu_add_region_to_set()
47 struct comms_atu_region_params_t *region; in get_region_idx_from_host_buf() local
50 region = &atu_regions[idx]; in get_region_idx_from_host_buf()
53 host_addr >= region->phys_addr && in get_region_idx_from_host_buf()
54 host_addr + size <= region->phys_addr + region->size) { in get_region_idx_from_host_buf()
63 enum tfm_plat_err_t comms_atu_get_rss_ptr_from_host_addr(uint8_t region, in comms_atu_get_rss_ptr_from_host_addr() argument
69 if (region >= RSS_COMMS_ATU_REGION_AM) { in comms_atu_get_rss_ptr_from_host_addr()
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Drss_comms_atu.h24 uint8_t region);
30 enum tfm_plat_err_t comms_atu_get_rss_ptr_from_host_addr(uint8_t region,
39 uint8_t *region);
45 enum tfm_plat_err_t comms_atu_free_region(uint8_t region);
/trusted-firmware-m-3.4.0/tools/templates/
Dpartition_load_info.template16 #include "region.h"
42 /* Memory region declaration */
195 {% for region in manifest.mmio_regions %}
196 {% if region.conditional %}
197 #ifdef {{region.conditional}}
199 {% if region.base and region.size %}
201 .mem.start = {{region.base}},
202 .mem.limit = {{region.base}} + {{region.size}},
204 {% elif region.name %}
206 .dev.dev_ref = PTR_TO_REFERENCE({{region.name}}),
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/trusted-firmware-m-3.4.0/docs/technical_references/design_docs/dual-cpu/
Dtfm_multi_core_access_check.rst15 permission to read or write the target memory region.
43 - Memory region is valid according to system settings
48 - Whether read/write attribute match between access and memory region
53 - Memory region is valid according to system settings
58 - Whether read/write attribute match between access and memory region
59 - Unprivileged secure access should not access privileged secure memory region
135 executes a general process to check if the access can access the target region.
140 target memory region. ``has_access_to_region()`` compares the access permission
141 with memory region attributes and determines whether the access is allowed to
142 access the region according to policy described in `Memory Access Check Policy`_
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/trusted-firmware-m-3.4.0/platform/ext/target/stm/common/stm32u5xx/Device/Source/armclang/
Dtfm_common_s.sct42 * This empty, zero long execution region is here to mark the start address
55 * This empty, zero long execution region is here to mark the end address
67 * This empty, zero long execution region is here to mark the start address
80 * This empty, zero long execution region is here to mark the end address
90 * This empty, zero long execution region is here to mark the start address
112 * This empty, zero long execution region is here to mark the end address
153 * This empty, zero long execution region is here to mark the start address
166 * This empty, zero long execution region is here to mark the end address
178 /* This empty, zero long execution region is here to mark the limit address
179 * of the last execution region that is allocated in SRAM.
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/trusted-firmware-m-3.4.0/platform/ext/common/armclang/
Dtfm_common_s.sct37 * 32 bytes aligned region so that the SAU can be programmed to
38 * just set this region as Non-Secure Callable.
44 * The Limit of the VENEER_ALIGN region should be at least 32 bytes aligned
45 * so that the SAU can set this region as Non-Secure Callable.
77 * This empty, zero long execution region is here to mark the start address
90 * This empty, zero long execution region is here to mark the end address
98 * This empty, zero long execution region is here to mark the start address
111 * This empty, zero long execution region is here to mark the end address
132 * alignment that MPU region base address must align with the MPU region
139 * privileged data region on Armv6-M/v7-M cores.
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Dtfm_isolation_l3.sct.template22 * Customized region name prefix abbreviation:
23 * LR : A Load region.
24 * ER : A typical execution region.
25 * PT : An empty execution region used as position-tag/address-alignment.
53 * 32 bytes aligned region so that the SAU can be programmed to
54 * just set this region as Non-Secure Callable.
60 * The Limit of the VENEER_ALIGN region should be at least 32 bytes aligned
61 * so that the SAU can set this region as Non-Secure Callable.
274 * No code will be placed here, just address of this region is used in the
276 * execution region description warning during linking.
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Dtfm_common_ns.sct36 /* This empty, zero long execution region is here to mark the limit address
37 * of the last execution region that is allocated in SRAM.
Dtfm_common_bl2.sct49 /* This empty, zero long execution region is here to mark the limit address
50 * of the last execution region that is allocated in SRAM.
/trusted-firmware-m-3.4.0/platform/ext/target/stm/common/stm32u5xx/Device/Source/iar/
Dtfm_common_s.icf57 * This empty, zero long execution region is here to mark the start address
67 * This empty, zero long execution region is here to mark the end address
77 * This empty, zero long execution region is here to mark the end address
110 * This empty, zero long execution region is here to mark the end address
143 * This empty, zero long execution region is here to mark the start address
154 * This empty, zero long execution region is here to mark the end address
170 /* This empty, zero long execution region is here to mark the limit address
171 * of the last execution region that is allocated in SRAM.
194 * This empty, zero long execution region is here to mark the end address
221 * This empty, zero long execution region is here to mark the start address
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/trusted-firmware-m-3.4.0/platform/ext/common/iar/
Dtfm_common_s.icf36 * at least 32 bytes aligned region so that the SAU can be programmed to
37 * just set this region as Non-Secure Callable.
70 * This empty, zero long execution region is here to mark the start address
82 * This empty, zero long execution region is here to mark the end address
89 * This empty, zero long execution region is here to mark the start address
99 * This empty, zero long execution region is here to mark the end address
155 * This empty, zero long execution region is here to mark the end address
214 * This empty, zero long execution region is here to mark the start address
227 * This empty, zero long execution region is here to mark the end address
243 /* This empty, zero long execution region is here to mark the limit address
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Dtfm_isolation_l3.icf.template22 * Customized region name prefix abbreviation:
23 * LR : A Load region.
24 * ER : A typical execution region.
25 * PT : An empty execution region used as position-tag/address-alignment.
49 * at least 32 bytes aligned region so that the SAU can be programmed to
50 * just set this region as Non-Secure Callable.
319 * No code will be placed here, just address of this region is used in the
321 * execution region description warning during linking.
328 * No code will be placed here, just address of this region is used in the
330 * execution region description warning during linking.
/trusted-firmware-m-3.4.0/platform/ext/target/nuvoton/m2354/device/source/armclang/
Dm2354_s.sct40 * This empty, zero long execution region is here to mark the start address
104 * This empty, zero long execution region is here to mark the end address
112 * This empty, zero long execution region is here to mark the start address
156 * This empty, zero long execution region is here to mark the end address
188 * This empty, zero long execution region is here to mark the start address
252 * This empty, zero long execution region is here to mark the end address
267 * This empty, zero long execution region is here to mark the start address
359 * This empty, zero long execution region is here to mark the end address
372 /* This empty, zero long execution region is here to mark the limit address
373 * of the last execution region that is allocated in SRAM.
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Dm2354_ns.sct36 /* This empty, zero long execution region is here to mark the limit address
37 * of the last execution region that is allocated in SRAM.
Dm2354_bl2.sct43 /* This empty, zero long execution region is here to mark the limit address
44 * of the last execution region that is allocated in SRAM.
/trusted-firmware-m-3.4.0/platform/ext/target/nuvoton/m2351/device/source/armclang/
Dm2351_s.sct40 * This empty, zero long execution region is here to mark the start address
104 * This empty, zero long execution region is here to mark the end address
112 * This empty, zero long execution region is here to mark the start address
156 * This empty, zero long execution region is here to mark the end address
194 * This empty, zero long execution region is here to mark the start address
258 * This empty, zero long execution region is here to mark the end address
273 * This empty, zero long execution region is here to mark the start address
365 * This empty, zero long execution region is here to mark the end address
378 /* This empty, zero long execution region is here to mark the limit address
379 * of the last execution region that is allocated in SRAM.
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Dm2351_ns.sct36 /* This empty, zero long execution region is here to mark the limit address
37 * of the last execution region that is allocated in SRAM.
Dm2351_bl2.sct43 /* This empty, zero long execution region is here to mark the limit address
44 * of the last execution region that is allocated in SRAM.
/trusted-firmware-m-3.4.0/platform/include/
Dregion.h40 #define PART_REGION_ADDR(partition, region) \ argument
41 (uintptr_t)&REGION_NAME(Image$$, partition, region)
/trusted-firmware-m-3.4.0/platform/ext/target/arm/musca_b1/Device/Source/armclang/
Dmusca_ns.sct36 /* This empty, zero long execution region is here to mark the limit address
37 * of the last execution region that is allocated in SRAM.
/trusted-firmware-m-3.4.0/platform/ext/target/arm/rss/common/device/source/armclang/
Drss_bl1_1.sct42 /* This empty, zero long execution region is here to mark the limit address
43 * of the last execution region that is allocated in SRAM.
Drss_bl1_2.sct39 /* This empty, zero long execution region is here to mark the limit address
40 * of the last execution region that is allocated in SRAM.
/trusted-firmware-m-3.4.0/platform/ext/target/cypress/psoc64/Device/Source/armclang/
Dpsoc6_ns.sct60 /* This empty, zero long execution region is here to mark the limit address
61 * of the last execution region that is allocated in SRAM.

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