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12

/hal_xtensa-3.5.0/src/hal/
Dmpu.c125 int i; in assert_maps_equivalent() local
126 for (i = 0; i < XCHAL_MPU_ENTRIES; i++) in assert_maps_equivalent()
128 assert_attributes_equivalent(XTHAL_MPU_ENTRY_GET_VSTARTADDR(initial[i]), initial, fg, bg); in assert_maps_equivalent()
129 assert_attributes_equivalent(XTHAL_MPU_ENTRY_GET_VSTARTADDR(fg[i]), initial, fg, bg); in assert_maps_equivalent()
131 for (i = 0; i < XCHAL_MPU_BACKGROUND_ENTRIES; i++) in assert_maps_equivalent()
132 assert_attributes_equivalent(XTHAL_MPU_ENTRY_GET_VSTARTADDR(bg[i]), initial, fg, bg); in assert_maps_equivalent()
364 int i; in _xthal_get_entry() local
365 for (i = XCHAL_MPU_ENTRIES - 1; i >= 0; i--) in _xthal_get_entry()
367 if (XTHAL_MPU_ENTRY_GET_VSTARTADDR(fg[i]) <= addr) in _xthal_get_entry()
369 if (XTHAL_MPU_ENTRY_GET_VALID(fg[i])) in _xthal_get_entry()
[all …]
Dinterrupts.c351 int i, j;
358 for( i = 0; i < XCHAL_NUM_INTLEVELS; i++ ) {
360 Xthal_vpri_enablemap[i][j] = XCHAL_INTLEVEL15_ANDBELOW_MASK
361 & ~Xthal_intlevel_andbelow_mask[i - (j < default_vpri && i > 0)];
363 for( i = 1; i < XCHAL_NUM_INTLEVELS; i++ ) {
365 Xthal_vpri_resolvemap[i-1][j] = 0;
367 Xthal_vpri_resolvemap[i-1][default_vpri & 0xF] |= Xthal_intlevel_mask[i];
369 Xthal_vpri_resolvemap[i-1][default_vpri & 0xE] |= Xthal_intlevel_mask[i];
371 Xthal_vpri_resolvemap[i-1][default_vpri & 0xC] |= Xthal_intlevel_mask[i];
373 Xthal_vpri_resolvemap[i-1][default_vpri & 0x8] |= Xthal_intlevel_mask[i];
[all …]
Ddisass.c88 int i, n; in xthal_disassemble() local
97 for( i = 0; i < 8; i++ ) { in xthal_disassemble()
106 for( i = 0; i < 3; i++ ) { in xthal_disassemble()
107 if( i < n ) { in xthal_disassemble()
Dattribute.c205 unsigned cacheattr, cachewrtr, i, disabled_cache = 0; in xthal_set_region_attribute()
238 for (i = start_region; i <= end_region; i++) { in xthal_set_region_attribute()
239 unsigned sh = (i << 2); /* bit offset of nibble for region i */ in xthal_set_region_attribute()
Dset_region_translate.c413 int i; in xthal_set_region_translation() local
457 for (i = start_va_reg; i <= end_va_reg; i++) { in xthal_set_region_translation()
458 unsigned sh = i << 2; in xthal_set_region_translation()
474 for (i = start_va_reg; i <= end_va_reg; i++) { in xthal_set_region_translation()
DMakefile.in193 unique=`for i in $$list; do \
194 if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
517 for i in $$list; do \
518 if test -f "$$i"; then \
519 echo "$(subdir)/$$i"; \
521 echo "$$sdir/$$i"; \
Ddebug.c156 unsigned char i, m, n, r, s, t, z; in xthal_inst_type() local
165 i = (inst>>27)&0x1; in xthal_inst_type()
179 i = (inst&0x80)>>7; in xthal_inst_type()
258 if (i) in xthal_inst_type()
/hal_xtensa-3.5.0/zephyr/soc/intel_apl_adsp/xtensa/config/
Dtie-asm.h180 ae_s64.i aed0, \ptr, .Lxchal_ofs_+24
181 ae_s64.i aed1, \ptr, .Lxchal_ofs_+32
182 ae_s64.i aed2, \ptr, .Lxchal_ofs_+40
183 ae_s64.i aed3, \ptr, .Lxchal_ofs_+48
184 ae_s64.i aed4, \ptr, .Lxchal_ofs_+56
186 ae_s64.i aed5, \ptr, .Lxchal_ofs_+0
187 ae_s64.i aed6, \ptr, .Lxchal_ofs_+8
188 ae_s64.i aed7, \ptr, .Lxchal_ofs_+16
189 ae_s64.i aed8, \ptr, .Lxchal_ofs_+24
190 ae_s64.i aed9, \ptr, .Lxchal_ofs_+32
[all …]
/hal_xtensa-3.5.0/zephyr/soc/mt8195_adsp/xtensa/config/
Dtie-asm.h164 ae_s64.i aed0, \ptr, .Lxchal_ofs_+40
165 ae_s64.i aed1, \ptr, .Lxchal_ofs_+48
166 ae_s64.i aed2, \ptr, .Lxchal_ofs_+56
168 ae_s64.i aed3, \ptr, .Lxchal_ofs_+0
169 ae_s64.i aed4, \ptr, .Lxchal_ofs_+8
170 ae_s64.i aed5, \ptr, .Lxchal_ofs_+16
171 ae_s64.i aed6, \ptr, .Lxchal_ofs_+24
172 ae_s64.i aed7, \ptr, .Lxchal_ofs_+32
173 ae_s64.i aed8, \ptr, .Lxchal_ofs_+40
174 ae_s64.i aed9, \ptr, .Lxchal_ofs_+48
[all …]
/hal_xtensa-3.5.0/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dtie-asm.h208 ae_s64.i aed0, \ptr, .Lxchal_ofs_+32
209 ae_s64.i aed1, \ptr, .Lxchal_ofs_+40
210 ae_s64.i aed2, \ptr, .Lxchal_ofs_+48
211 ae_s64.i aed3, \ptr, .Lxchal_ofs_+56
213 ae_s64.i aed4, \ptr, .Lxchal_ofs_+0
214 ae_s64.i aed5, \ptr, .Lxchal_ofs_+8
215 ae_s64.i aed6, \ptr, .Lxchal_ofs_+16
216 ae_s64.i aed7, \ptr, .Lxchal_ofs_+24
217 ae_s64.i aed8, \ptr, .Lxchal_ofs_+32
218 ae_s64.i aed9, \ptr, .Lxchal_ofs_+40
[all …]
/hal_xtensa-3.5.0/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dtie-asm.h168 ae_s64.i aed0, \ptr, .Lxchal_ofs_+40
169 ae_s64.i aed1, \ptr, .Lxchal_ofs_+48
170 ae_s64.i aed2, \ptr, .Lxchal_ofs_+56
172 ae_s64.i aed3, \ptr, .Lxchal_ofs_+0
173 ae_s64.i aed4, \ptr, .Lxchal_ofs_+8
174 ae_s64.i aed5, \ptr, .Lxchal_ofs_+16
175 ae_s64.i aed6, \ptr, .Lxchal_ofs_+24
176 ae_s64.i aed7, \ptr, .Lxchal_ofs_+32
177 ae_s64.i aed8, \ptr, .Lxchal_ofs_+40
178 ae_s64.i aed9, \ptr, .Lxchal_ofs_+48
[all …]
/hal_xtensa-3.5.0/zephyr/soc/nxp_imx8/xtensa/config/
Dtie-asm.h166 ae_s64.i aed0, \ptr, .Lxchal_ofs_+40
167 ae_s64.i aed1, \ptr, .Lxchal_ofs_+48
168 ae_s64.i aed2, \ptr, .Lxchal_ofs_+56
170 ae_s64.i aed3, \ptr, .Lxchal_ofs_+0
171 ae_s64.i aed4, \ptr, .Lxchal_ofs_+8
172 ae_s64.i aed5, \ptr, .Lxchal_ofs_+16
173 ae_s64.i aed6, \ptr, .Lxchal_ofs_+24
174 ae_s64.i aed7, \ptr, .Lxchal_ofs_+32
175 ae_s64.i aed8, \ptr, .Lxchal_ofs_+40
176 ae_s64.i aed9, \ptr, .Lxchal_ofs_+48
[all …]
/hal_xtensa-3.5.0/zephyr/soc/mimx8ml8/xtensa/config/
Dtie-asm.h166 ae_s64.i aed0, \ptr, .Lxchal_ofs_+40
167 ae_s64.i aed1, \ptr, .Lxchal_ofs_+48
168 ae_s64.i aed2, \ptr, .Lxchal_ofs_+56
170 ae_s64.i aed3, \ptr, .Lxchal_ofs_+0
171 ae_s64.i aed4, \ptr, .Lxchal_ofs_+8
172 ae_s64.i aed5, \ptr, .Lxchal_ofs_+16
173 ae_s64.i aed6, \ptr, .Lxchal_ofs_+24
174 ae_s64.i aed7, \ptr, .Lxchal_ofs_+32
175 ae_s64.i aed8, \ptr, .Lxchal_ofs_+40
176 ae_s64.i aed9, \ptr, .Lxchal_ofs_+48
[all …]
/hal_xtensa-3.5.0/zephyr/soc/intel_cnl_adsp/xtensa/config/
Dtie-asm.h265 ae_s64.i aed0, \ptr, .Lxchal_ofs_+24
266 ae_s64.i aed1, \ptr, .Lxchal_ofs_+32
267 ae_s64.i aed2, \ptr, .Lxchal_ofs_+40
268 ae_s64.i aed3, \ptr, .Lxchal_ofs_+48
269 ae_s64.i aed4, \ptr, .Lxchal_ofs_+56
271 ae_s64.i aed5, \ptr, .Lxchal_ofs_+0
272 ae_s64.i aed6, \ptr, .Lxchal_ofs_+8
273 ae_s64.i aed7, \ptr, .Lxchal_ofs_+16
274 ae_s64.i aed8, \ptr, .Lxchal_ofs_+24
275 ae_s64.i aed9, \ptr, .Lxchal_ofs_+32
[all …]
/hal_xtensa-3.5.0/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dtie-asm.h265 ae_s64.i aed0, \ptr, .Lxchal_ofs_+24
266 ae_s64.i aed1, \ptr, .Lxchal_ofs_+32
267 ae_s64.i aed2, \ptr, .Lxchal_ofs_+40
268 ae_s64.i aed3, \ptr, .Lxchal_ofs_+48
269 ae_s64.i aed4, \ptr, .Lxchal_ofs_+56
271 ae_s64.i aed5, \ptr, .Lxchal_ofs_+0
272 ae_s64.i aed6, \ptr, .Lxchal_ofs_+8
273 ae_s64.i aed7, \ptr, .Lxchal_ofs_+16
274 ae_s64.i aed8, \ptr, .Lxchal_ofs_+24
275 ae_s64.i aed9, \ptr, .Lxchal_ofs_+32
[all …]
/hal_xtensa-3.5.0/zephyr/soc/intel_icl_adsp/xtensa/config/
Dtie-asm.h265 ae_s64.i aed0, \ptr, .Lxchal_ofs_+24
266 ae_s64.i aed1, \ptr, .Lxchal_ofs_+32
267 ae_s64.i aed2, \ptr, .Lxchal_ofs_+40
268 ae_s64.i aed3, \ptr, .Lxchal_ofs_+48
269 ae_s64.i aed4, \ptr, .Lxchal_ofs_+56
271 ae_s64.i aed5, \ptr, .Lxchal_ofs_+0
272 ae_s64.i aed6, \ptr, .Lxchal_ofs_+8
273 ae_s64.i aed7, \ptr, .Lxchal_ofs_+16
274 ae_s64.i aed8, \ptr, .Lxchal_ofs_+24
275 ae_s64.i aed9, \ptr, .Lxchal_ofs_+32
[all …]
/hal_xtensa-3.5.0/
Dconfig.guess538 i*86:AIX:*:*)
742 i*86:OSF1:*:*)
802 i*86:BSD/386:*:* | i*86:BSD/OS:*:* | *:Ascend\ Embedded/OS:*:*)
820 i*:CYGWIN*:*)
832 i*:windows32*:*)
836 i*:PW*:*)
852 echo i${UNAME_MACHINE}-pc-mks
857 i*:Windows_NT*:* | Pentium*:Windows_NT*:*)
863 i*:UWIN*:*)
883 i*86:Minix:*:*)
[all …]
Ddepcomp391 i=$numtries
392 while test $i -gt 0; do
404 while test -d "$lockdir" && test $i -gt 0; do
406 i=`expr $i - 1`
409 i=`expr $i - 1`
412 if test $i -le 0; then
DMakefile.in142 unique=`for i in $$list; do \
143 if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
422 for i in $$list; do \
423 if test -f "$$i"; then \
424 echo "$(subdir)/$$i"; \
426 echo "$$sdir/$$i"; \
594 list='$(DIST_ARCHIVES)'; for i in $$list; do echo $$i; done) | \
Dconfigure3295 int test (int i, double x);
3450 for i in 1 2 3 4 5 6; do
3451 echo '#include "conftst'$i'.h"' >> sub/conftest.c
3454 echo '/* dummy */' > sub/conftst$i.h
3583 for i in 1 2 3 4 5 6; do
3584 echo '#include "conftst'$i'.h"' >> sub/conftest.c
3587 echo '/* dummy */' > sub/conftst$i.h
4326 int test (int i, double x);
4481 for i in 1 2 3 4 5 6; do
4482 echo '#include "conftst'$i'.h"' >> sub/conftest.c
[all …]
Dconfig.sub358 i*86 | x86_64)
/hal_xtensa-3.5.0/include/xtensa/
Dxdm-regs.h421 int i = 0; in regname() local
422 while (list[i].reg != -1) { in regname()
423 if (list[i].reg == reg) in regname()
425 i++; in regname()
427 return list[i].name; in regname()
Dtrax.h58 #define ffs(i) __builtin_ffs(i) argument
/hal_xtensa-3.5.0/include/
DMakefile.in153 unique=`for i in $$list; do \
154 if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
377 for i in $$list; do \
378 if test -f "$$i"; then \
379 echo "$(subdir)/$$i"; \
381 echo "$$sdir/$$i"; \
/hal_xtensa-3.5.0/include/xtensa/config/
Dcore.h882 #define _XCHAL_ITLB_SET_E(n,i,_what) XCHAL_ITLB_SET ## n ## _E ## i ## _what argument
883 #define XCHAL_ITLB_SET_E(n,i,what) _XCHAL_ITLB_SET_E(n,i, _ ## what ) argument
886 #define _XCHAL_DTLB_SET_E(n,i,_what) XCHAL_DTLB_SET ## n ## _E ## i ## _what argument
887 #define XCHAL_DTLB_SET_E(n,i,what) _XCHAL_DTLB_SET_E(n,i, _ ## what ) argument

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