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Searched refs:AON_RTC_BASE (Results 1 – 16 of 16) sorted by relevance

/hal_ti-latest/simplelink/source/ti/devices/cc13x2x7_cc26x2x7/driverlib/
Daon_rtc.h175 HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_EN_BITN) = 1; in AONRTCEnable()
196 HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_EN_BITN) = 0; in AONRTCDisable()
212 HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_RESET_BITN) = 1; in AONRTCReset()
228 return(HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_EN_BITN)); in AONRTCActive()
253 uint32Status = HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH0_EN_BITN); in AONRTCChannelActive()
258 uint32Status = HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH1_EN_BITN); in AONRTCChannelActive()
263 uint32Status = HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH2_EN_BITN); in AONRTCChannelActive()
308 ui32Cfg = HWREG(AON_RTC_BASE + AON_RTC_O_CTL); in AONRTCDelayConfig()
312 HWREG(AON_RTC_BASE + AON_RTC_O_CTL) = ui32Cfg; in AONRTCDelayConfig()
343 ui32Cfg = HWREG(AON_RTC_BASE + AON_RTC_O_CTL); in AONRTCCombinedEventConfig()
[all …]
Daon_rtc.c69 currentRtc.secAndSubSec[ 1 ] = HWREG( AON_RTC_BASE + NONSECURE_OFFSET + AON_RTC_O_SEC ); in AONRTCCurrent64BitValueGet()
70 currentRtc.secAndSubSec[ 0 ] = HWREG( AON_RTC_BASE + NONSECURE_OFFSET + AON_RTC_O_SUBSEC ); in AONRTCCurrent64BitValueGet()
71 ui32SecondSecRead = HWREG( AON_RTC_BASE + NONSECURE_OFFSET + AON_RTC_O_SEC ); in AONRTCCurrent64BitValueGet()
Dsys_ctrl.h339 HWREG(AON_RTC_BASE + NONSECURE_OFFSET + AON_RTC_O_SYNC); in SysCtrlAonSync()
365 HWREG(AON_RTC_BASE + NONSECURE_OFFSET + AON_RTC_O_SYNC) = 1; in SysCtrlAonUpdate()
366 HWREG(AON_RTC_BASE + NONSECURE_OFFSET + AON_RTC_O_SYNC); in SysCtrlAonUpdate()
Dpwr_ctrl.h243 HWREG(AON_RTC_BASE + AON_RTC_O_SYNC); in PowerCtrlPadSleepEnable()
265 HWREG(AON_RTC_BASE + AON_RTC_O_SYNC); in PowerCtrlPadSleepDisable()
Dsetup_rom.c134 … HWREG( AON_RTC_BASE + AON_RTC_O_SYNC ); // Wait for VDDR_LOSS_EN setting to propagate in SetupStepVddrTrimTo()
138 …HWREG( AON_RTC_BASE + AON_RTC_O_SYNCLF ); // Wait for next edge on SCLK_LF (positive or negativ… in SetupStepVddrTrimTo()
149 …HWREG( AON_RTC_BASE + AON_RTC_O_SYNCLF ); // Wait for next edge on SCLK_LF (positive or neg… in SetupStepVddrTrimTo()
152 …HWREG( AON_RTC_BASE + AON_RTC_O_SYNCLF ); // Wait for next edge on SCLK_LF (positive or negativ… in SetupStepVddrTrimTo()
153 …HWREG( AON_RTC_BASE + AON_RTC_O_SYNCLF ); // Wait for next edge on SCLK_LF (positive or negativ… in SetupStepVddrTrimTo()
155 …HWREG( AON_RTC_BASE + AON_RTC_O_SYNC ); // And finally wait for VDDR_LOSS_EN setting to propa… in SetupStepVddrTrimTo()
Dosc.c765 HWREG( AON_RTC_BASE + AON_RTC_O_SYNCLF ); in OSCHF_DebugGetCrystalStartupTime()
769 HWREG( AON_RTC_BASE + AON_RTC_O_SYNCLF ); in OSCHF_DebugGetCrystalStartupTime()
/hal_ti-latest/simplelink/source/ti/devices/cc13x2_cc26x2/driverlib/
Daon_rtc.h176 HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_EN_BITN) = 1; in AONRTCEnable()
197 HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_EN_BITN) = 0; in AONRTCDisable()
213 HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_RESET_BITN) = 1; in AONRTCReset()
229 return(HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_EN_BITN)); in AONRTCActive()
254 uint32Status = HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH0_EN_BITN); in AONRTCChannelActive()
259 uint32Status = HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH1_EN_BITN); in AONRTCChannelActive()
264 uint32Status = HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH2_EN_BITN); in AONRTCChannelActive()
309 ui32Cfg = HWREG(AON_RTC_BASE + AON_RTC_O_CTL); in AONRTCDelayConfig()
313 HWREG(AON_RTC_BASE + AON_RTC_O_CTL) = ui32Cfg; in AONRTCDelayConfig()
344 ui32Cfg = HWREG(AON_RTC_BASE + AON_RTC_O_CTL); in AONRTCCombinedEventConfig()
[all …]
Daon_rtc.c71 currentRtc.secAndSubSec[ 1 ] = HWREG( AON_RTC_BASE + AON_RTC_O_SEC ); in AONRTCCurrent64BitValueGet()
72 currentRtc.secAndSubSec[ 0 ] = HWREG( AON_RTC_BASE + AON_RTC_O_SUBSEC ); in AONRTCCurrent64BitValueGet()
73 ui32SecondSecRead = HWREG( AON_RTC_BASE + AON_RTC_O_SEC ); in AONRTCCurrent64BitValueGet()
Dsys_ctrl.h340 HWREG(AON_RTC_BASE + AON_RTC_O_SYNC); in SysCtrlAonSync()
366 HWREG(AON_RTC_BASE + AON_RTC_O_SYNC) = 1; in SysCtrlAonUpdate()
367 HWREG(AON_RTC_BASE + AON_RTC_O_SYNC); in SysCtrlAonUpdate()
Dpwr_ctrl.h245 HWREG(AON_RTC_BASE + AON_RTC_O_SYNC); in PowerCtrlPadSleepEnable()
267 HWREG(AON_RTC_BASE + AON_RTC_O_SYNC); in PowerCtrlPadSleepDisable()
Dsetup_rom.c135 … HWREG( AON_RTC_BASE + AON_RTC_O_SYNC ); // Wait for VDDR_LOSS_EN setting to propagate in SetupStepVddrTrimTo()
139 …HWREG( AON_RTC_BASE + AON_RTC_O_SYNCLF ); // Wait for next edge on SCLK_LF (positive or negativ… in SetupStepVddrTrimTo()
150 …HWREG( AON_RTC_BASE + AON_RTC_O_SYNCLF ); // Wait for next edge on SCLK_LF (positive or neg… in SetupStepVddrTrimTo()
153 …HWREG( AON_RTC_BASE + AON_RTC_O_SYNCLF ); // Wait for next edge on SCLK_LF (positive or negativ… in SetupStepVddrTrimTo()
154 …HWREG( AON_RTC_BASE + AON_RTC_O_SYNCLF ); // Wait for next edge on SCLK_LF (positive or negativ… in SetupStepVddrTrimTo()
156 …HWREG( AON_RTC_BASE + AON_RTC_O_SYNC ); // And finally wait for VDDR_LOSS_EN setting to propa… in SetupStepVddrTrimTo()
Dosc.c765 HWREG( AON_RTC_BASE + AON_RTC_O_SYNCLF ); in OSCHF_DebugGetCrystalStartupTime()
768 HWREG( AON_RTC_BASE + AON_RTC_O_SYNCLF ); in OSCHF_DebugGetCrystalStartupTime()
/hal_ti-latest/simplelink/source/ti/devices/cc13x2x7_cc26x2x7/inc/
Dhw_memmap.h84 #define AON_RTC_BASE 0x40092000 // AON_RTC macro
/hal_ti-latest/simplelink/source/ti/devices/cc13x2_cc26x2/inc/
Dhw_memmap.h84 #define AON_RTC_BASE 0x40092000 // AON_RTC macro
/hal_ti-latest/simplelink/source/ti/drivers/power/
DPowerCC26X2_calibrateRCOSC.c625 oldSubSecInc = HWREG(AON_RTC_BASE + AON_RTC_O_SUBSECINC) & 0x00FFFFFF; in updateSubSecInc()
/hal_ti-latest/simplelink/source/ti/drivers/rf/
DRFCC26X2_multiMode.c3661 HWREG(AON_RTC_BASE + AON_RTC_O_CTL) |= AON_RTC_CTL_RTC_UPD_EN_M; in RF_init()