1 /******************************************************************************
2 * Filename: aon_rtc.h
3 *
4 * Description: Defines and prototypes for the AON RTC
5 *
6 * Copyright (c) 2015 - 2022, Texas Instruments Incorporated
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions are met:
11 *
12 * 1) Redistributions of source code must retain the above copyright notice,
13 * this list of conditions and the following disclaimer.
14 *
15 * 2) Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
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18 *
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20 * be used to endorse or promote products derived from this software without
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22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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35 ******************************************************************************/
36
37 //*****************************************************************************
38 //
39 //! \addtogroup aon_group
40 //! @{
41 //! \addtogroup aonrtc_api
42 //! @{
43 //
44 //*****************************************************************************
45
46 #ifndef __AON_RTC_H__
47 #define __AON_RTC_H__
48
49 //*****************************************************************************
50 //
51 // If building with a C++ compiler, make all of the definitions in this header
52 // have a C binding.
53 //
54 //*****************************************************************************
55 #ifdef __cplusplus
56 extern "C"
57 {
58 #endif
59
60 #include <stdbool.h>
61 #include <stdint.h>
62 #include "../inc/hw_types.h"
63 #include "../inc/hw_memmap.h"
64 #include "../inc/hw_memmap_common.h"
65 #include "../inc/hw_aon_rtc.h"
66 #include "debug.h"
67
68 //*****************************************************************************
69 //
70 // Support for DriverLib in ROM:
71 // This section renames all functions that are not "static inline", so that
72 // calling these functions will default to implementation in flash. At the end
73 // of this file a second renaming will change the defaults to implementation in
74 // ROM for available functions.
75 //
76 // To force use of the implementation in flash, e.g. for debugging:
77 // - Globally: Define DRIVERLIB_NOROM at project level
78 // - Per function: Use prefix "NOROM_" when calling the function
79 //
80 //*****************************************************************************
81 #if !defined(DOXYGEN)
82 #define AONRTCCurrent64BitValueGet NOROM_AONRTCCurrent64BitValueGet
83 #endif
84
85 //*****************************************************************************
86 //
87 // Values that can be passed to most of the AON_RTC APIs as the ui32Channel
88 // parameter.
89 //
90 //*****************************************************************************
91 #define AON_RTC_CH_NONE 0x0 // RTC No channel
92 #define AON_RTC_CH0 0x1 // RTC Channel 0
93 #define AON_RTC_CH1 0x2 // RTC Channel 1
94 #define AON_RTC_CH2 0x4 // RTC Channel 2
95 #define AON_RTC_ACTIVE 0x8 // RTC Active
96
97 //*****************************************************************************
98 //
99 // Values that can be passed to AONRTCConfigDelay as the ui32Delay parameter.
100 //
101 //*****************************************************************************
102 #define AON_RTC_CONFIG_DELAY_NODELAY 0 // NO DELAY
103 #define AON_RTC_CONFIG_DELAY_1 1 // Delay of 1 clk cycle
104 #define AON_RTC_CONFIG_DELAY_2 2 // Delay of 2 clk cycles
105 #define AON_RTC_CONFIG_DELAY_4 3 // Delay of 4 clk cycles
106 #define AON_RTC_CONFIG_DELAY_8 4 // Delay of 8 clk cycles
107 #define AON_RTC_CONFIG_DELAY_16 5 // Delay of 16 clk cycles
108 #define AON_RTC_CONFIG_DELAY_32 6 // Delay of 32 clk cycles
109 #define AON_RTC_CONFIG_DELAY_48 7 // Delay of 48 clk cycles
110 #define AON_RTC_CONFIG_DELAY_64 8 // Delay of 64 clk cycles
111 #define AON_RTC_CONFIG_DELAY_80 9 // Delay of 80 clk cycles
112 #define AON_RTC_CONFIG_DELAY_96 10 // Delay of 96 clk cycles
113 #define AON_RTC_CONFIG_DELAY_112 11 // Delay of 112 clk cycles
114 #define AON_RTC_CONFIG_DELAY_128 12 // Delay of 128 clk cycles
115 #define AON_RTC_CONFIG_DELAY_144 13 // Delay of 144 clk cycles
116
117 //*****************************************************************************
118 //
119 // Values that can be passed to AONRTCSetModeCH1 as the ui32Mode
120 // parameter.
121 //
122 //*****************************************************************************
123 #define AON_RTC_MODE_CH1_CAPTURE 1 // Capture mode
124 #define AON_RTC_MODE_CH1_COMPARE 0 // Compare Mode
125
126 //*****************************************************************************
127 //
128 // Values that can be passed to AONRTCSetModeCH2 as the ui32Mode
129 // parameter.
130 //
131 //*****************************************************************************
132 #define AON_RTC_MODE_CH2_CONTINUOUS 1 // Continuous mode
133 #define AON_RTC_MODE_CH2_NORMALCOMPARE 0 // Normal compare mode
134
135 //*****************************************************************************
136 //
137 // Mutliplication factor for converting from seconds to corresponding time in
138 // the "CompareValue" format.
139 // The factor correspond to the compare value format described in the registers
140 // \ref AON_RTC_O_CH0CMP, \ref AON_RTC_O_CH1CMP and \ref AON_RTC_O_CH2CMP.
141 // Example1:
142 // 4 milliseconds in CompareValue format can be written like this:
143 // ((uint32_t)( 0.004 * FACTOR_SEC_TO_COMP_VAL_FORMAT ))
144 // Example2:
145 // 4 seconds in CompareValue format can be written like this:
146 // ( 4 * FACTOR_SEC_TO_COMP_VAL_FORMAT )
147 //
148 //*****************************************************************************
149 #define FACTOR_SEC_TO_COMP_VAL_FORMAT 0x00010000
150
151 //*****************************************************************************
152 //
153 // API Functions and prototypes
154 //
155 //*****************************************************************************
156
157 //*****************************************************************************
158 //
159 //! \brief Enable the RTC.
160 //!
161 //! Enable the AON Real Time Clock.
162 //!
163 //! \note Event generation for each of the three channels must also be enabled
164 //! using the function AONRTCChannelEnable().
165 //!
166 //! \return None
167 //!
168 //! \sa AONRTCChannelEnable()
169 //
170 //*****************************************************************************
171 __STATIC_INLINE void
AONRTCEnable(void)172 AONRTCEnable(void)
173 {
174 // Enable RTC.
175 HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_EN_BITN) = 1;
176 }
177
178 //*****************************************************************************
179 //
180 //! \brief Disable the RTC.
181 //!
182 //! Disable the AON Real Time Clock.
183 //!
184 //! \note Event generation for each of the three channels can also be disabled
185 //! using the function AONRTCChannelDisable().
186 //!
187 //! \return None
188 //!
189 //! \sa AONRTCChannelDisable()
190 //
191 //*****************************************************************************
192 __STATIC_INLINE void
AONRTCDisable(void)193 AONRTCDisable(void)
194 {
195 // Disable RTC
196 HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_EN_BITN) = 0;
197 }
198
199 //*****************************************************************************
200 //
201 //! \brief Reset the RTC.
202 //!
203 //! Reset the AON Real Time Clock.
204 //!
205 //! \return None
206 //
207 //*****************************************************************************
208 __STATIC_INLINE void
AONRTCReset(void)209 AONRTCReset(void)
210 {
211 // Reset RTC.
212 HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_RESET_BITN) = 1;
213 }
214
215 //*****************************************************************************
216 //
217 //! \brief Check if the RTC is active (enabled).
218 //!
219 //! \return Returns the status of the RTC.
220 //! - false : RTC is disabled
221 //! - true : RTC is enabled
222 //
223 //*****************************************************************************
224 __STATIC_INLINE bool
AONRTCActive(void)225 AONRTCActive(void)
226 {
227 // Read if RTC is enabled
228 return(HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_EN_BITN));
229 }
230
231 //*****************************************************************************
232 //
233 //! \brief Check if an RTC channel is active (enabled).
234 //!
235 //! \param ui32Channel specifies the RTC channel to check status of.
236 //! Parameter must be one (and only one) of the following:
237 //! - \ref AON_RTC_CH0
238 //! - \ref AON_RTC_CH1
239 //! - \ref AON_RTC_CH2
240 //!
241 //! \return Returns the status of the requested channel:
242 //! - false : Channel is disabled
243 //! - true : Channel is enabled
244 //
245 //*****************************************************************************
246 __STATIC_INLINE bool
AONRTCChannelActive(uint32_t ui32Channel)247 AONRTCChannelActive(uint32_t ui32Channel)
248 {
249 uint32_t uint32Status = 0;
250
251 if(ui32Channel & AON_RTC_CH0)
252 {
253 uint32Status = HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH0_EN_BITN);
254 }
255
256 if(ui32Channel & AON_RTC_CH1)
257 {
258 uint32Status = HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH1_EN_BITN);
259 }
260
261 if(ui32Channel & AON_RTC_CH2)
262 {
263 uint32Status = HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH2_EN_BITN);
264 }
265
266 return(uint32Status);
267 }
268
269 //*****************************************************************************
270 //
271 //! \brief Configure Event Delay for the RTC.
272 //!
273 //! Each event from the three individual channels can generate a delayed
274 //! event. The delay time for these events is set using this function.
275 //! The delay is measured in clock cycles.
276 //!
277 //! \note There is only one delay setting shared for all three channels.
278 //!
279 //! \param ui32Delay specifies the delay time for delayed events.
280 //! Parameter must be one of the following:
281 //! - \ref AON_RTC_CONFIG_DELAY_NODELAY
282 //! - \ref AON_RTC_CONFIG_DELAY_1
283 //! - \ref AON_RTC_CONFIG_DELAY_2
284 //! - \ref AON_RTC_CONFIG_DELAY_4
285 //! - \ref AON_RTC_CONFIG_DELAY_8
286 //! - \ref AON_RTC_CONFIG_DELAY_16
287 //! - \ref AON_RTC_CONFIG_DELAY_32
288 //! - \ref AON_RTC_CONFIG_DELAY_48
289 //! - \ref AON_RTC_CONFIG_DELAY_64
290 //! - \ref AON_RTC_CONFIG_DELAY_80
291 //! - \ref AON_RTC_CONFIG_DELAY_96
292 //! - \ref AON_RTC_CONFIG_DELAY_112
293 //! - \ref AON_RTC_CONFIG_DELAY_128
294 //! - \ref AON_RTC_CONFIG_DELAY_144
295 //!
296 //! \return None.
297 //
298 //*****************************************************************************
299 __STATIC_INLINE void
AONRTCDelayConfig(uint32_t ui32Delay)300 AONRTCDelayConfig(uint32_t ui32Delay)
301 {
302 uint32_t ui32Cfg;
303
304 // Check the arguments.
305 ASSERT(ui32Delay <= AON_RTC_CONFIG_DELAY_144);
306
307
308 ui32Cfg = HWREG(AON_RTC_BASE + AON_RTC_O_CTL);
309 ui32Cfg &= ~(AON_RTC_CTL_EV_DELAY_M);
310 ui32Cfg |= (ui32Delay << AON_RTC_CTL_EV_DELAY_S);
311
312 HWREG(AON_RTC_BASE + AON_RTC_O_CTL) = ui32Cfg;
313 }
314
315 //*****************************************************************************
316 //
317 //! \brief Configure the source of the combined event.
318 //!
319 //! A combined delayed event can be generated from a combination of the three
320 //! delayed events. Delayed events form the specified channels are OR'ed
321 //! together to generate the combined event.
322 //!
323 //! \param ui32Channels specifies the channels that are to be used for
324 //! generating the combined event.
325 //! The parameter must be the bitwise OR of any of the following:
326 //! - \ref AON_RTC_CH0
327 //! - \ref AON_RTC_CH1
328 //! - \ref AON_RTC_CH2
329 //! - \ref AON_RTC_CH_NONE
330 //!
331 //! \return None
332 //
333 //*****************************************************************************
334 __STATIC_INLINE void
AONRTCCombinedEventConfig(uint32_t ui32Channels)335 AONRTCCombinedEventConfig(uint32_t ui32Channels)
336 {
337 uint32_t ui32Cfg;
338
339 // Check the arguments.
340 ASSERT( (ui32Channels & (AON_RTC_CH0 | AON_RTC_CH1 | AON_RTC_CH2)) ||
341 (ui32Channels == AON_RTC_CH_NONE) );
342
343 ui32Cfg = HWREG(AON_RTC_BASE + AON_RTC_O_CTL);
344 ui32Cfg &= ~(AON_RTC_CTL_COMB_EV_MASK_M);
345 ui32Cfg |= (ui32Channels << AON_RTC_CTL_COMB_EV_MASK_S);
346
347 HWREG(AON_RTC_BASE + AON_RTC_O_CTL) = ui32Cfg;
348 }
349
350 //*****************************************************************************
351 //
352 //! \brief Clear event from a specified channel.
353 //!
354 //! In case of an active event from the specified channel, the event
355 //! will be cleared (de-asserted).
356 //!
357 //! \param ui32Channel clears the event from one or more RTC channels:
358 //! - \ref AON_RTC_CH0
359 //! - \ref AON_RTC_CH1
360 //! - \ref AON_RTC_CH2
361 //!
362 //! \return None
363 //
364 //*****************************************************************************
365 __STATIC_INLINE void
AONRTCEventClear(uint32_t ui32Channel)366 AONRTCEventClear(uint32_t ui32Channel)
367 {
368 // Check the arguments.
369 ASSERT((ui32Channel == AON_RTC_CH0) ||
370 (ui32Channel == AON_RTC_CH1) ||
371 (ui32Channel == AON_RTC_CH2));
372
373 if(ui32Channel & AON_RTC_CH0)
374 {
375 HWREG(AON_RTC_BASE + AON_RTC_O_EVFLAGS + NONSECURE_OFFSET) = AON_RTC_EVFLAGS_CH0;
376 }
377
378 if(ui32Channel & AON_RTC_CH1)
379 {
380 HWREG(AON_RTC_BASE + AON_RTC_O_EVFLAGS + NONSECURE_OFFSET) = AON_RTC_EVFLAGS_CH1;
381 }
382
383 if(ui32Channel & AON_RTC_CH2)
384 {
385 HWREG(AON_RTC_BASE + AON_RTC_O_EVFLAGS + NONSECURE_OFFSET) = AON_RTC_EVFLAGS_CH2;
386 }
387 }
388
389 //*****************************************************************************
390 //
391 //! \brief Get event status for a specified channel.
392 //!
393 //! In case of an active event from the specified channel,
394 //! this call will return \c true otherwise \c false.
395 //!
396 //! \param ui32Channel specifies the channel from which to query the event state.
397 //! The parameter must be one (and only one) of the following:
398 //! - \ref AON_RTC_CH0
399 //! - \ref AON_RTC_CH1
400 //! - \ref AON_RTC_CH2
401 //!
402 //! \return Returns \c true if an event has occurred for the given channel,
403 //! otherwise \c false.
404 //
405 //*****************************************************************************
406 __STATIC_INLINE bool
AONRTCEventGet(uint32_t ui32Channel)407 AONRTCEventGet(uint32_t ui32Channel)
408 {
409 uint32_t uint32Event = 0;
410
411 // Check the arguments.
412 ASSERT((ui32Channel == AON_RTC_CH0) ||
413 (ui32Channel == AON_RTC_CH1) ||
414 (ui32Channel == AON_RTC_CH2));
415
416 if(ui32Channel & AON_RTC_CH0)
417 {
418 uint32Event = HWREGBITW(AON_RTC_BASE + AON_RTC_O_EVFLAGS, AON_RTC_EVFLAGS_CH0_BITN);
419 }
420
421 if(ui32Channel & AON_RTC_CH1)
422 {
423 uint32Event = HWREGBITW(AON_RTC_BASE + AON_RTC_O_EVFLAGS, AON_RTC_EVFLAGS_CH1_BITN);
424 }
425
426 if(ui32Channel & AON_RTC_CH2)
427 {
428 uint32Event = HWREGBITW(AON_RTC_BASE + AON_RTC_O_EVFLAGS, AON_RTC_EVFLAGS_CH2_BITN);
429 }
430
431 return(uint32Event);
432 }
433
434 //*****************************************************************************
435 //
436 //! \brief Get integer part (seconds) of RTC free-running timer.
437 //!
438 //! Get the value in seconds of RTC free-running timer, i.e. the integer part.
439 //! The fractional part is returned from a call to AONRTCFractionGet().
440 //!
441 //! \note It is recommended to use \ref AONRTCCurrentCompareValueGet() instead
442 //! of this function if the <16.16> format is sufficient.
443 //!
444 //! \note To read a consistent pair of integer and fractional parts,
445 //! \ref AONRTCSecGet() must be called first to trigger latching of the
446 //! fractional part, which is then read by \ref AONRTCFractionGet(). Interrupts
447 //! must be disabled to ensure that these operations are performed atomically.
448 //!
449 //! \return Returns the integer part of RTC free running timer.
450 //!
451 //! \sa \ref AONRTCFractionGet() \ref AONRTCCurrentCompareValueGet()
452 //
453 //*****************************************************************************
454 __STATIC_INLINE uint32_t
AONRTCSecGet(void)455 AONRTCSecGet(void)
456 {
457 // The following read gets the seconds, but also latches the fractional
458 // part.
459 return(HWREG(AON_RTC_BASE + AON_RTC_O_SEC + NONSECURE_OFFSET));
460 }
461
462 //*****************************************************************************
463 //
464 //! \brief Get fractional part (sub-seconds) of RTC free-running timer.
465 //!
466 //! Get the value of the fractional part of RTC free-running timer, i.e. the
467 //! sub-second part.
468 //!
469 //! \note It is recommended to use \ref AONRTCCurrentCompareValueGet() instead
470 //! of this function if the <16.16> format is sufficient.
471 //!
472 //! \note To read a consistent pair of integer and fractional parts,
473 //! \ref AONRTCSecGet() must be called first to trigger latching of the
474 //! fractional part, which is then read by \ref AONRTCFractionGet(). Interrupts
475 //! must be disabled to ensure that these operations are performed atomically.
476 //!
477 //! \return Returns the fractional part of RTC free running timer.
478 //!
479 //! \sa \ref AONRTCSecGet() \ref AONRTCCurrentCompareValueGet()
480 //
481 //*****************************************************************************
482 __STATIC_INLINE uint32_t
AONRTCFractionGet(void)483 AONRTCFractionGet(void)
484 {
485 // Note1: It is recommended to use AON RTCCurrentCompareValueGet() instead
486 // of this function if the <16.16> format is sufficient.
487 // Note2: AONRTCSecGet() must be called before this function to get a
488 // consistent reading.
489 // Note3: Interrupts must be disabled between the call to AONRTCSecGet() and this
490 // call since there are interrupt functions that reads AON_RTC_O_SEC
491 return(HWREG(AON_RTC_BASE + AON_RTC_O_SUBSEC + NONSECURE_OFFSET));
492 }
493
494 //*****************************************************************************
495 //
496 //! \brief Get the sub second increment of the RTC.
497 //!
498 //! Get the value of the sub-second increment which is added to the RTC
499 //! absolute time on every clock tick.
500 //!
501 //! \note For a precise and temperature independent LF clock (e.g. an LF XTAL)
502 //! this value would stay the same across temperature. For temperatue
503 //! dependent clock sources like an RC oscillator, this value will change
504 //! over time if the application includes functionality for doing temperature
505 //! compensation of the RTC clock source. The default value corresponds to a
506 //! LF clock frequency of exactly 32.768 kHz.
507 //!
508 //! \return Returns the sub-second increment of the RTC added to the overall
509 //! value on every RTC clock tick.
510 //
511 //*****************************************************************************
512 __STATIC_INLINE uint32_t
AONRTCSubSecIncrGet(void)513 AONRTCSubSecIncrGet(void)
514 {
515 return(HWREG(AON_RTC_BASE + AON_RTC_O_SUBSECINC + NONSECURE_OFFSET));
516 }
517
518 //*****************************************************************************
519 //
520 //! \brief Set operational mode of channel 1.
521 //!
522 //! Set the operational mode of channel 1. It can be capture or compare mode.
523 //! In capture mode, an external event causes the value of the free running
524 //! counter to be stored, to remember the time of the event.
525 //!
526 //! \note The default mode is compare.
527 //!
528 //! \param ui32Mode specifies the mode for channel 1.
529 //! The parameter must be one of the following:
530 //! - \ref AON_RTC_MODE_CH1_CAPTURE
531 //! - \ref AON_RTC_MODE_CH1_COMPARE
532 //!
533 //! \return None
534 //!
535 //! \sa AONRTCModeCh1Get()
536 //
537 //*****************************************************************************
538 __STATIC_INLINE void
AONRTCModeCh1Set(uint32_t ui32Mode)539 AONRTCModeCh1Set(uint32_t ui32Mode)
540 {
541 // Check the arguments.
542 ASSERT((ui32Mode == AON_RTC_MODE_CH1_CAPTURE) ||
543 (ui32Mode == AON_RTC_MODE_CH1_COMPARE));
544
545 HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH1_CAPT_EN_BITN) = ui32Mode;
546 }
547
548 //*****************************************************************************
549 //
550 //! \brief Get operational mode of channel 1.
551 //!
552 //! Get the operational mode of channel 1. It can be capture or compare mode.
553 //! In capture mode, an external event causes the value of the free running
554 //! counter to be stored, to remember the time of the event.
555 //!
556 //! \return Returns the operational mode of channel 1, one of:
557 //! - \ref AON_RTC_MODE_CH1_CAPTURE
558 //! - \ref AON_RTC_MODE_CH1_COMPARE
559 //!
560 //! \sa AONRTCModeCh1Set()
561 //
562 //*****************************************************************************
563 __STATIC_INLINE uint32_t
AONRTCModeCh1Get(void)564 AONRTCModeCh1Get(void)
565 {
566 return(HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH1_CAPT_EN_BITN));
567 }
568
569 //*****************************************************************************
570 //
571 //! \brief Set operational mode of channel 2.
572 //!
573 //! Set the operational mode of channel 2. It can be in continuous compare
574 //! mode or normal compare mode.
575 //! In continuous mode, a value is automatically incremented to the channel 2
576 //! compare register, upon a channel 2 compare event. This allows channel 2 to
577 //! generate a series of completely equidistant events.
578 //! The increment value is set by the AONRTCIncValueCh2Set() call.
579 //!
580 //! \note The default mode is normal compare.
581 //!
582 //! \param ui32Mode specifies the mode for channel 2.
583 //! The parameter must be one of the following:
584 //! - \ref AON_RTC_MODE_CH2_CONTINUOUS
585 //! - \ref AON_RTC_MODE_CH2_NORMALCOMPARE
586 //!
587 //! \return None
588 //!
589 //! \sa AONRTCIncValueCh2Set(), AONRTCIncValueCh2Get()
590 //
591 //*****************************************************************************
592 __STATIC_INLINE void
AONRTCModeCh2Set(uint32_t ui32Mode)593 AONRTCModeCh2Set(uint32_t ui32Mode)
594 {
595 // Check the arguments.
596 ASSERT((ui32Mode == AON_RTC_MODE_CH2_CONTINUOUS) ||
597 (ui32Mode == AON_RTC_MODE_CH2_NORMALCOMPARE));
598
599 HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH2_CONT_EN_BITN) = ui32Mode;
600 }
601
602 //*****************************************************************************
603 //
604 //! \brief Get operational mode of channel 2.
605 //!
606 //! Get the operational mode of channel 2. It can be in continuous compare
607 //! mode or normal compare mode.
608 //! In continuous mode, a value is automatically incremented to the channel 2
609 //! compare register, upon a channel 2 compare event. This allows channel 2 to
610 //! generate a series of completely equidistant events.
611 //! The increment value is set by the AONRTCIncValueCh2Set() call.
612 //!
613 //! \return Returns the operational mode of channel 2, i.e. one of:
614 //! - \ref AON_RTC_MODE_CH2_CONTINUOUS
615 //! - \ref AON_RTC_MODE_CH2_NORMALCOMPARE
616 //!
617 //! \sa AONRTCIncValueCh2Set(), AONRTCIncValueCh2Get()
618 //
619 //*****************************************************************************
620 __STATIC_INLINE uint32_t
AONRTCModeCh2Get(void)621 AONRTCModeCh2Get(void)
622 {
623 return(HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH2_CONT_EN_BITN));
624 }
625
626 //*****************************************************************************
627 //
628 //! \brief Enable event operation for the specified channel.
629 //!
630 //! Enable the event generation for the specified channel.
631 //!
632 //! \note The RTC free running clock must also be enabled globally using the
633 //! AONRTCEnable() call.
634 //!
635 //! \param ui32Channel specifies one or more channels to enable:
636 //! - \ref AON_RTC_CH0
637 //! - \ref AON_RTC_CH1
638 //! - \ref AON_RTC_CH2
639 //!
640 //! \return None
641 //!
642 //! \sa AONRTCEnable()
643 //
644 //*****************************************************************************
645 __STATIC_INLINE void
AONRTCChannelEnable(uint32_t ui32Channel)646 AONRTCChannelEnable(uint32_t ui32Channel)
647 {
648 // Check the arguments.
649 ASSERT((ui32Channel == AON_RTC_CH0) ||
650 (ui32Channel == AON_RTC_CH1) ||
651 (ui32Channel == AON_RTC_CH2));
652
653 if(ui32Channel & AON_RTC_CH0)
654 {
655 HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH0_EN_BITN) = 1;
656 }
657
658 if(ui32Channel & AON_RTC_CH1)
659 {
660 HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH1_EN_BITN) = 1;
661 }
662
663 if(ui32Channel & AON_RTC_CH2)
664 {
665 HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH2_EN_BITN) = 1;
666 }
667 }
668
669 //*****************************************************************************
670 //
671 //! \brief Disable event operation for the specified channel.
672 //!
673 //! Disable the event generation for the specified channel.
674 //!
675 //! \note The RTC free running clock can also be disabled globally using the
676 //! AONRTCDisable() call.
677 //!
678 //! \param ui32Channel specifies one or more channels to disable:
679 //! - \ref AON_RTC_CH0
680 //! - \ref AON_RTC_CH1
681 //! - \ref AON_RTC_CH2
682 //!
683 //! \return None
684 //!
685 //! \sa AONRTCDisable()
686 //
687 //*****************************************************************************
688 __STATIC_INLINE void
AONRTCChannelDisable(uint32_t ui32Channel)689 AONRTCChannelDisable(uint32_t ui32Channel)
690 {
691 // Check the arguments.
692 ASSERT((ui32Channel == AON_RTC_CH0) ||
693 (ui32Channel == AON_RTC_CH1) ||
694 (ui32Channel == AON_RTC_CH2));
695
696 if(ui32Channel & AON_RTC_CH0)
697 {
698 HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH0_EN_BITN) = 0;
699 }
700
701 if(ui32Channel & AON_RTC_CH1)
702 {
703 HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH1_EN_BITN) = 0;
704 }
705
706 if(ui32Channel & AON_RTC_CH2)
707 {
708 HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH2_EN_BITN) = 0;
709 }
710 }
711
712 //*****************************************************************************
713 //
714 //! \brief Set the compare value for the given channel.
715 //!
716 //! Set compare value for the specified channel.
717 //!
718 //! The format of the compare value is a 16 bit integer and 16 bit fractional
719 //! format <16 sec.16 subsec>. The current value of the RTC counter
720 //! can be retrieved in a format compatible to the compare register using
721 //! \ref AONRTCCurrentCompareValueGet()
722 //!
723 //! \param ui32Channel specifies one or more channels to set compare value for:
724 //! - \ref AON_RTC_CH0
725 //! - \ref AON_RTC_CH1
726 //! - \ref AON_RTC_CH2
727 //! \param ui32CompValue is the compare value to set for the specified channel.
728 //! - Format: <16 sec.16 subsec>
729 //!
730 //! \return None
731 //!
732 //! \sa AONRTCCurrentCompareValueGet()
733 //
734 //*****************************************************************************
735 __STATIC_INLINE void
AONRTCCompareValueSet(uint32_t ui32Channel,uint32_t ui32CompValue)736 AONRTCCompareValueSet(uint32_t ui32Channel, uint32_t ui32CompValue)
737 {
738 // Check the arguments.
739 ASSERT((ui32Channel == AON_RTC_CH0) ||
740 (ui32Channel == AON_RTC_CH1) ||
741 (ui32Channel == AON_RTC_CH2));
742
743 if(ui32Channel & AON_RTC_CH0)
744 {
745 HWREG(AON_RTC_BASE + AON_RTC_O_CH0CMP + NONSECURE_OFFSET) = ui32CompValue;
746 }
747
748 if(ui32Channel & AON_RTC_CH1)
749 {
750 HWREG(AON_RTC_BASE + AON_RTC_O_CH1CMP + NONSECURE_OFFSET) = ui32CompValue;
751 }
752
753 if(ui32Channel & AON_RTC_CH2)
754 {
755 HWREG(AON_RTC_BASE + AON_RTC_O_CH2CMP + NONSECURE_OFFSET) = ui32CompValue;
756 }
757 }
758
759 //*****************************************************************************
760 //
761 //! \brief Get the compare value for the given channel.
762 //!
763 //! Get compare value for the specified channel.
764 //!
765 //! \param ui32Channel specifies a channel.
766 //! The parameter must be one (and only one) of the following:
767 //! - \ref AON_RTC_CH0
768 //! - \ref AON_RTC_CH1
769 //! - \ref AON_RTC_CH2
770 //!
771 //! \return Returns the stored compare value for the given channel.
772 //
773 //*****************************************************************************
774 __STATIC_INLINE uint32_t
AONRTCCompareValueGet(uint32_t ui32Channel)775 AONRTCCompareValueGet(uint32_t ui32Channel)
776 {
777 uint32_t ui32Value = 0;
778
779 // Check the arguments
780 ASSERT((ui32Channel == AON_RTC_CH0) ||
781 (ui32Channel == AON_RTC_CH1) ||
782 (ui32Channel == AON_RTC_CH2));
783
784 if(ui32Channel & AON_RTC_CH0)
785 {
786 ui32Value = HWREG(AON_RTC_BASE + AON_RTC_O_CH0CMP + NONSECURE_OFFSET);
787 }
788
789 if(ui32Channel & AON_RTC_CH1)
790 {
791 ui32Value = HWREG(AON_RTC_BASE + AON_RTC_O_CH1CMP + NONSECURE_OFFSET);
792 }
793
794 if(ui32Channel & AON_RTC_CH2)
795 {
796 ui32Value = HWREG(AON_RTC_BASE + AON_RTC_O_CH2CMP + NONSECURE_OFFSET);
797 }
798
799 return(ui32Value);
800 }
801
802 //*****************************************************************************
803 //
804 //! \brief Get the current value of the RTC counter in a format that matches
805 //! RTC compare values.
806 //!
807 //! The compare value registers contains 16 integer and 16 fractional bits.
808 //! This function will return the current value of the RTC counter in an
809 //! identical format.
810 //!
811 //! \return Returns the current value of the RTC counter in a <16.16> format
812 //! (SEC[15:0].SUBSEC[31:16]).
813 //!
814 //! \sa \ref AONRTCCompareValueSet()
815 //
816 //*****************************************************************************
817 __STATIC_INLINE uint32_t
AONRTCCurrentCompareValueGet(void)818 AONRTCCurrentCompareValueGet( void )
819 {
820 return ( HWREG( AON_RTC_BASE + AON_RTC_O_TIME + NONSECURE_OFFSET ));
821 }
822
823 //*****************************************************************************
824 //
825 //! \brief Get the current 64-bit value of the RTC counter.
826 //!
827 //! \note Reading SEC both before and after SUBSEC in order to detect if SEC
828 //! incremented while reading SUBSEC. If SEC incremented, we can't be sure
829 //! which SEC the SUBSEC belongs to, so repeating the sequence then.
830 //!
831 //! \return Returns the current value of the RTC counter in a 64-bits format
832 //! (SEC[31:0].SUBSEC[31:0]).
833 //
834 //*****************************************************************************
835 extern uint64_t AONRTCCurrent64BitValueGet(void);
836
837 //*****************************************************************************
838 //
839 //! \brief Set the channel 2 increment value when operating in continuous mode.
840 //!
841 //! Set the channel 2 increment value when operating in continuous mode.
842 //! The specified value is automatically incremented to the channel 2 compare
843 //! register, upon a channel 2 compare event. This allows channel 2 to generate
844 //! a series of completely equidistant events.
845 //!
846 //! \param ui32IncValue is the increment value when operating in continuous mode.
847 //!
848 //! \return None
849 //!
850 //! \sa AONRTCIncValueCh2Get()
851 //
852 //*****************************************************************************
853 __STATIC_INLINE void
AONRTCIncValueCh2Set(uint32_t ui32IncValue)854 AONRTCIncValueCh2Set(uint32_t ui32IncValue)
855 {
856 HWREG(AON_RTC_BASE + AON_RTC_O_CH2CMPINC + NONSECURE_OFFSET) = ui32IncValue;
857 }
858
859 //*****************************************************************************
860 //
861 //! \brief Get the channel2 increment value when operating in continuous mode.
862 //!
863 //! Get the channel 2 increment value, when channel 2 is operating in
864 //! continuous mode.
865 //! This value is automatically incremented to the channel 2 compare
866 //! register, upon a channel 2 compare event. This allows channel 2 to
867 //! generate a series of completely equidistant events.
868 //!
869 //! \return Returns the channel 2 increment value when operating in continuous
870 //! mode.
871 //!
872 //! \sa AONRTCIncValueCh2Set()
873 //
874 //*****************************************************************************
875 __STATIC_INLINE uint32_t
AONRTCIncValueCh2Get(void)876 AONRTCIncValueCh2Get(void)
877 {
878 return(HWREG(AON_RTC_BASE + AON_RTC_O_CH2CMPINC + NONSECURE_OFFSET));
879 }
880
881 //*****************************************************************************
882 //
883 //! \brief Get the channel 1 capture value.
884 //!
885 //! Get the channel 1 capture value.
886 //! The upper 16 bits of the returned value is the lower 16 bits of the
887 //! integer part of the RTC timer. The lower 16 bits of the returned part
888 //! is the upper 16 bits of the fractional part.
889 //!
890 //! \return Returns the channel 1 capture value.
891 //
892 //*****************************************************************************
893 __STATIC_INLINE uint32_t
AONRTCCaptureValueCh1Get(void)894 AONRTCCaptureValueCh1Get(void)
895 {
896 return(HWREG(AON_RTC_BASE + AON_RTC_O_CH1CAPT + NONSECURE_OFFSET));
897 }
898
899 //*****************************************************************************
900 //
901 // Support for DriverLib in ROM:
902 // Redirect to implementation in ROM when available.
903 //
904 //*****************************************************************************
905 #if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
906 #include "../driverlib/rom.h"
907 #ifdef ROM_AONRTCCurrent64BitValueGet
908 #undef AONRTCCurrent64BitValueGet
909 #define AONRTCCurrent64BitValueGet ROM_AONRTCCurrent64BitValueGet
910 #endif
911 #endif
912
913 //*****************************************************************************
914 //
915 // Mark the end of the C bindings section for C++ compilers.
916 //
917 //*****************************************************************************
918 #ifdef __cplusplus
919 }
920 #endif
921
922 #endif // __AON_RTC_H__
923
924 //*****************************************************************************
925 //
926 //! Close the Doxygen group.
927 //! @}
928 //! @}
929 //
930 //*****************************************************************************
931