1 /******************************************************************************
2 * Filename: aon_rtc.h
3 * Revised: 2020-08-25 16:10:23 +0200 (Tue, 25 Aug 2020)
4 * Revision: 58298
5 *
6 * Description: Defines and prototypes for the AON RTC
7 *
8 * Copyright (c) 2015 - 2020, Texas Instruments Incorporated
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions are met:
13 *
14 * 1) Redistributions of source code must retain the above copyright notice,
15 * this list of conditions and the following disclaimer.
16 *
17 * 2) Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 *
21 * 3) Neither the name of the ORGANIZATION nor the names of its contributors may
22 * be used to endorse or promote products derived from this software without
23 * specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
29 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 *
37 ******************************************************************************/
38
39 //*****************************************************************************
40 //
41 //! \addtogroup aon_group
42 //! @{
43 //! \addtogroup aonrtc_api
44 //! @{
45 //
46 //*****************************************************************************
47
48 #ifndef __AON_RTC_H__
49 #define __AON_RTC_H__
50
51 //*****************************************************************************
52 //
53 // If building with a C++ compiler, make all of the definitions in this header
54 // have a C binding.
55 //
56 //*****************************************************************************
57 #ifdef __cplusplus
58 extern "C"
59 {
60 #endif
61
62 #include <stdbool.h>
63 #include <stdint.h>
64 #include "../inc/hw_types.h"
65 #include "../inc/hw_memmap.h"
66 #include "../inc/hw_aon_rtc.h"
67 #include "debug.h"
68
69 //*****************************************************************************
70 //
71 // Support for DriverLib in ROM:
72 // This section renames all functions that are not "static inline", so that
73 // calling these functions will default to implementation in flash. At the end
74 // of this file a second renaming will change the defaults to implementation in
75 // ROM for available functions.
76 //
77 // To force use of the implementation in flash, e.g. for debugging:
78 // - Globally: Define DRIVERLIB_NOROM at project level
79 // - Per function: Use prefix "NOROM_" when calling the function
80 //
81 //*****************************************************************************
82 #if !defined(DOXYGEN)
83 #define AONRTCCurrent64BitValueGet NOROM_AONRTCCurrent64BitValueGet
84 #endif
85
86 //*****************************************************************************
87 //
88 // Values that can be passed to most of the AON_RTC APIs as the ui32Channel
89 // parameter.
90 //
91 //*****************************************************************************
92 #define AON_RTC_CH_NONE 0x0 // RTC No channel
93 #define AON_RTC_CH0 0x1 // RTC Channel 0
94 #define AON_RTC_CH1 0x2 // RTC Channel 1
95 #define AON_RTC_CH2 0x4 // RTC Channel 2
96 #define AON_RTC_ACTIVE 0x8 // RTC Active
97
98 //*****************************************************************************
99 //
100 // Values that can be passed to AONRTCConfigDelay as the ui32Delay parameter.
101 //
102 //*****************************************************************************
103 #define AON_RTC_CONFIG_DELAY_NODELAY 0 // NO DELAY
104 #define AON_RTC_CONFIG_DELAY_1 1 // Delay of 1 clk cycle
105 #define AON_RTC_CONFIG_DELAY_2 2 // Delay of 2 clk cycles
106 #define AON_RTC_CONFIG_DELAY_4 3 // Delay of 4 clk cycles
107 #define AON_RTC_CONFIG_DELAY_8 4 // Delay of 8 clk cycles
108 #define AON_RTC_CONFIG_DELAY_16 5 // Delay of 16 clk cycles
109 #define AON_RTC_CONFIG_DELAY_32 6 // Delay of 32 clk cycles
110 #define AON_RTC_CONFIG_DELAY_48 7 // Delay of 48 clk cycles
111 #define AON_RTC_CONFIG_DELAY_64 8 // Delay of 64 clk cycles
112 #define AON_RTC_CONFIG_DELAY_80 9 // Delay of 80 clk cycles
113 #define AON_RTC_CONFIG_DELAY_96 10 // Delay of 96 clk cycles
114 #define AON_RTC_CONFIG_DELAY_112 11 // Delay of 112 clk cycles
115 #define AON_RTC_CONFIG_DELAY_128 12 // Delay of 128 clk cycles
116 #define AON_RTC_CONFIG_DELAY_144 13 // Delay of 144 clk cycles
117
118 //*****************************************************************************
119 //
120 // Values that can be passed to AONRTCSetModeCH1 as the ui32Mode
121 // parameter.
122 //
123 //*****************************************************************************
124 #define AON_RTC_MODE_CH1_CAPTURE 1 // Capture mode
125 #define AON_RTC_MODE_CH1_COMPARE 0 // Compare Mode
126
127 //*****************************************************************************
128 //
129 // Values that can be passed to AONRTCSetModeCH2 as the ui32Mode
130 // parameter.
131 //
132 //*****************************************************************************
133 #define AON_RTC_MODE_CH2_CONTINUOUS 1 // Continuous mode
134 #define AON_RTC_MODE_CH2_NORMALCOMPARE 0 // Normal compare mode
135
136 //*****************************************************************************
137 //
138 // Mutliplication factor for converting from seconds to corresponding time in
139 // the "CompareValue" format.
140 // The factor correspond to the compare value format described in the registers
141 // \ref AON_RTC_O_CH0CMP, \ref AON_RTC_O_CH1CMP and \ref AON_RTC_O_CH2CMP.
142 // Example1:
143 // 4 milliseconds in CompareValue format can be written like this:
144 // ((uint32_t)( 0.004 * FACTOR_SEC_TO_COMP_VAL_FORMAT ))
145 // Example2:
146 // 4 seconds in CompareValue format can be written like this:
147 // ( 4 * FACTOR_SEC_TO_COMP_VAL_FORMAT )
148 //
149 //*****************************************************************************
150 #define FACTOR_SEC_TO_COMP_VAL_FORMAT 0x00010000
151
152 //*****************************************************************************
153 //
154 // API Functions and prototypes
155 //
156 //*****************************************************************************
157
158 //*****************************************************************************
159 //
160 //! \brief Enable the RTC.
161 //!
162 //! Enable the AON Real Time Clock.
163 //!
164 //! \note Event generation for each of the three channels must also be enabled
165 //! using the function AONRTCChannelEnable().
166 //!
167 //! \return None
168 //!
169 //! \sa AONRTCChannelEnable()
170 //
171 //*****************************************************************************
172 __STATIC_INLINE void
AONRTCEnable(void)173 AONRTCEnable(void)
174 {
175 // Enable RTC.
176 HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_EN_BITN) = 1;
177 }
178
179 //*****************************************************************************
180 //
181 //! \brief Disable the RTC.
182 //!
183 //! Disable the AON Real Time Clock.
184 //!
185 //! \note Event generation for each of the three channels can also be disabled
186 //! using the function AONRTCChannelDisable().
187 //!
188 //! \return None
189 //!
190 //! \sa AONRTCChannelDisable()
191 //
192 //*****************************************************************************
193 __STATIC_INLINE void
AONRTCDisable(void)194 AONRTCDisable(void)
195 {
196 // Disable RTC
197 HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_EN_BITN) = 0;
198 }
199
200 //*****************************************************************************
201 //
202 //! \brief Reset the RTC.
203 //!
204 //! Reset the AON Real Time Clock.
205 //!
206 //! \return None
207 //
208 //*****************************************************************************
209 __STATIC_INLINE void
AONRTCReset(void)210 AONRTCReset(void)
211 {
212 // Reset RTC.
213 HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_RESET_BITN) = 1;
214 }
215
216 //*****************************************************************************
217 //
218 //! \brief Check if the RTC is active (enabled).
219 //!
220 //! \return Returns the status of the RTC.
221 //! - false : RTC is disabled
222 //! - true : RTC is enabled
223 //
224 //*****************************************************************************
225 __STATIC_INLINE bool
AONRTCActive(void)226 AONRTCActive(void)
227 {
228 // Read if RTC is enabled
229 return(HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_EN_BITN));
230 }
231
232 //*****************************************************************************
233 //
234 //! \brief Check if an RTC channel is active (enabled).
235 //!
236 //! \param ui32Channel specifies the RTC channel to check status of.
237 //! Parameter must be one (and only one) of the following:
238 //! - \ref AON_RTC_CH0
239 //! - \ref AON_RTC_CH1
240 //! - \ref AON_RTC_CH2
241 //!
242 //! \return Returns the status of the requested channel:
243 //! - false : Channel is disabled
244 //! - true : Channel is enabled
245 //
246 //*****************************************************************************
247 __STATIC_INLINE bool
AONRTCChannelActive(uint32_t ui32Channel)248 AONRTCChannelActive(uint32_t ui32Channel)
249 {
250 uint32_t uint32Status = 0;
251
252 if(ui32Channel & AON_RTC_CH0)
253 {
254 uint32Status = HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH0_EN_BITN);
255 }
256
257 if(ui32Channel & AON_RTC_CH1)
258 {
259 uint32Status = HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH1_EN_BITN);
260 }
261
262 if(ui32Channel & AON_RTC_CH2)
263 {
264 uint32Status = HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH2_EN_BITN);
265 }
266
267 return(uint32Status);
268 }
269
270 //*****************************************************************************
271 //
272 //! \brief Configure Event Delay for the RTC.
273 //!
274 //! Each event from the three individual channels can generate a delayed
275 //! event. The delay time for these events is set using this function.
276 //! The delay is measured in clock cycles.
277 //!
278 //! \note There is only one delay setting shared for all three channels.
279 //!
280 //! \param ui32Delay specifies the delay time for delayed events.
281 //! Parameter must be one of the following:
282 //! - \ref AON_RTC_CONFIG_DELAY_NODELAY
283 //! - \ref AON_RTC_CONFIG_DELAY_1
284 //! - \ref AON_RTC_CONFIG_DELAY_2
285 //! - \ref AON_RTC_CONFIG_DELAY_4
286 //! - \ref AON_RTC_CONFIG_DELAY_8
287 //! - \ref AON_RTC_CONFIG_DELAY_16
288 //! - \ref AON_RTC_CONFIG_DELAY_32
289 //! - \ref AON_RTC_CONFIG_DELAY_48
290 //! - \ref AON_RTC_CONFIG_DELAY_64
291 //! - \ref AON_RTC_CONFIG_DELAY_80
292 //! - \ref AON_RTC_CONFIG_DELAY_96
293 //! - \ref AON_RTC_CONFIG_DELAY_112
294 //! - \ref AON_RTC_CONFIG_DELAY_128
295 //! - \ref AON_RTC_CONFIG_DELAY_144
296 //!
297 //! \return None.
298 //
299 //*****************************************************************************
300 __STATIC_INLINE void
AONRTCDelayConfig(uint32_t ui32Delay)301 AONRTCDelayConfig(uint32_t ui32Delay)
302 {
303 uint32_t ui32Cfg;
304
305 // Check the arguments.
306 ASSERT(ui32Delay <= AON_RTC_CONFIG_DELAY_144);
307
308
309 ui32Cfg = HWREG(AON_RTC_BASE + AON_RTC_O_CTL);
310 ui32Cfg &= ~(AON_RTC_CTL_EV_DELAY_M);
311 ui32Cfg |= (ui32Delay << AON_RTC_CTL_EV_DELAY_S);
312
313 HWREG(AON_RTC_BASE + AON_RTC_O_CTL) = ui32Cfg;
314 }
315
316 //*****************************************************************************
317 //
318 //! \brief Configure the source of the combined event.
319 //!
320 //! A combined delayed event can be generated from a combination of the three
321 //! delayed events. Delayed events form the specified channels are OR'ed
322 //! together to generate the combined event.
323 //!
324 //! \param ui32Channels specifies the channels that are to be used for
325 //! generating the combined event.
326 //! The parameter must be the bitwise OR of any of the following:
327 //! - \ref AON_RTC_CH0
328 //! - \ref AON_RTC_CH1
329 //! - \ref AON_RTC_CH2
330 //! - \ref AON_RTC_CH_NONE
331 //!
332 //! \return None
333 //
334 //*****************************************************************************
335 __STATIC_INLINE void
AONRTCCombinedEventConfig(uint32_t ui32Channels)336 AONRTCCombinedEventConfig(uint32_t ui32Channels)
337 {
338 uint32_t ui32Cfg;
339
340 // Check the arguments.
341 ASSERT( (ui32Channels & (AON_RTC_CH0 | AON_RTC_CH1 | AON_RTC_CH2)) ||
342 (ui32Channels == AON_RTC_CH_NONE) );
343
344 ui32Cfg = HWREG(AON_RTC_BASE + AON_RTC_O_CTL);
345 ui32Cfg &= ~(AON_RTC_CTL_COMB_EV_MASK_M);
346 ui32Cfg |= (ui32Channels << AON_RTC_CTL_COMB_EV_MASK_S);
347
348 HWREG(AON_RTC_BASE + AON_RTC_O_CTL) = ui32Cfg;
349 }
350
351 //*****************************************************************************
352 //
353 //! \brief Clear event from a specified channel.
354 //!
355 //! In case of an active event from the specified channel, the event
356 //! will be cleared (de-asserted).
357 //!
358 //! \param ui32Channel clears the event from one or more RTC channels:
359 //! - \ref AON_RTC_CH0
360 //! - \ref AON_RTC_CH1
361 //! - \ref AON_RTC_CH2
362 //!
363 //! \return None
364 //
365 //*****************************************************************************
366 __STATIC_INLINE void
AONRTCEventClear(uint32_t ui32Channel)367 AONRTCEventClear(uint32_t ui32Channel)
368 {
369 // Check the arguments.
370 ASSERT((ui32Channel == AON_RTC_CH0) ||
371 (ui32Channel == AON_RTC_CH1) ||
372 (ui32Channel == AON_RTC_CH2));
373
374 if(ui32Channel & AON_RTC_CH0)
375 {
376 HWREG(AON_RTC_BASE + AON_RTC_O_EVFLAGS) = AON_RTC_EVFLAGS_CH0;
377 }
378
379 if(ui32Channel & AON_RTC_CH1)
380 {
381 HWREG(AON_RTC_BASE + AON_RTC_O_EVFLAGS) = AON_RTC_EVFLAGS_CH1;
382 }
383
384 if(ui32Channel & AON_RTC_CH2)
385 {
386 HWREG(AON_RTC_BASE + AON_RTC_O_EVFLAGS) = AON_RTC_EVFLAGS_CH2;
387 }
388 }
389
390 //*****************************************************************************
391 //
392 //! \brief Get event status for a specified channel.
393 //!
394 //! In case of an active event from the specified channel,
395 //! this call will return \c true otherwise \c false.
396 //!
397 //! \param ui32Channel specifies the channel from which to query the event state.
398 //! The parameter must be one (and only one) of the following:
399 //! - \ref AON_RTC_CH0
400 //! - \ref AON_RTC_CH1
401 //! - \ref AON_RTC_CH2
402 //!
403 //! \return Returns \c true if an event has occurred for the given channel,
404 //! otherwise \c false.
405 //
406 //*****************************************************************************
407 __STATIC_INLINE bool
AONRTCEventGet(uint32_t ui32Channel)408 AONRTCEventGet(uint32_t ui32Channel)
409 {
410 uint32_t uint32Event = 0;
411
412 // Check the arguments.
413 ASSERT((ui32Channel == AON_RTC_CH0) ||
414 (ui32Channel == AON_RTC_CH1) ||
415 (ui32Channel == AON_RTC_CH2));
416
417 if(ui32Channel & AON_RTC_CH0)
418 {
419 uint32Event = HWREGBITW(AON_RTC_BASE + AON_RTC_O_EVFLAGS, AON_RTC_EVFLAGS_CH0_BITN);
420 }
421
422 if(ui32Channel & AON_RTC_CH1)
423 {
424 uint32Event = HWREGBITW(AON_RTC_BASE + AON_RTC_O_EVFLAGS, AON_RTC_EVFLAGS_CH1_BITN);
425 }
426
427 if(ui32Channel & AON_RTC_CH2)
428 {
429 uint32Event = HWREGBITW(AON_RTC_BASE + AON_RTC_O_EVFLAGS, AON_RTC_EVFLAGS_CH2_BITN);
430 }
431
432 return(uint32Event);
433 }
434
435 //*****************************************************************************
436 //
437 //! \brief Get integer part (seconds) of RTC free-running timer.
438 //!
439 //! Get the value in seconds of RTC free-running timer, i.e. the integer part.
440 //! The fractional part is returned from a call to AONRTCFractionGet().
441 //!
442 //! \note It is recommended to use \ref AONRTCCurrentCompareValueGet() instead
443 //! of this function if the <16.16> format is sufficient.
444 //!
445 //! \note To read a consistent pair of integer and fractional parts,
446 //! \ref AONRTCSecGet() must be called first to trigger latching of the
447 //! fractional part, which is then read by \ref AONRTCFractionGet(). Interrupts
448 //! must be disabled to ensure that these operations are performed atomically.
449 //!
450 //! \return Returns the integer part of RTC free running timer.
451 //!
452 //! \sa \ref AONRTCFractionGet() \ref AONRTCCurrentCompareValueGet()
453 //
454 //*****************************************************************************
455 __STATIC_INLINE uint32_t
AONRTCSecGet(void)456 AONRTCSecGet(void)
457 {
458 // The following read gets the seconds, but also latches the fractional
459 // part.
460 return(HWREG(AON_RTC_BASE + AON_RTC_O_SEC));
461 }
462
463 //*****************************************************************************
464 //
465 //! \brief Get fractional part (sub-seconds) of RTC free-running timer.
466 //!
467 //! Get the value of the fractional part of RTC free-running timer, i.e. the
468 //! sub-second part.
469 //!
470 //! \note It is recommended to use \ref AONRTCCurrentCompareValueGet() instead
471 //! of this function if the <16.16> format is sufficient.
472 //!
473 //! \note To read a consistent pair of integer and fractional parts,
474 //! \ref AONRTCSecGet() must be called first to trigger latching of the
475 //! fractional part, which is then read by \ref AONRTCFractionGet(). Interrupts
476 //! must be disabled to ensure that these operations are performed atomically.
477 //!
478 //! \return Returns the fractional part of RTC free running timer.
479 //!
480 //! \sa \ref AONRTCSecGet() \ref AONRTCCurrentCompareValueGet()
481 //
482 //*****************************************************************************
483 __STATIC_INLINE uint32_t
AONRTCFractionGet(void)484 AONRTCFractionGet(void)
485 {
486 // Note1: It is recommended to use AON RTCCurrentCompareValueGet() instead
487 // of this function if the <16.16> format is sufficient.
488 // Note2: AONRTCSecGet() must be called before this function to get a
489 // consistent reading.
490 // Note3: Interrupts must be disabled between the call to AONRTCSecGet() and this
491 // call since there are interrupt functions that reads AON_RTC_O_SEC
492 return(HWREG(AON_RTC_BASE + AON_RTC_O_SUBSEC));
493 }
494
495 //*****************************************************************************
496 //
497 //! \brief Get the sub second increment of the RTC.
498 //!
499 //! Get the value of the sub-second increment which is added to the RTC
500 //! absolute time on every clock tick.
501 //!
502 //! \note For a precise and temperature independent LF clock (e.g. an LF XTAL)
503 //! this value would stay the same across temperature. For temperatue
504 //! dependent clock sources like an RC oscillator, this value will change
505 //! over time if the application includes functionality for doing temperature
506 //! compensation of the RTC clock source. The default value corresponds to a
507 //! LF clock frequency of exactly 32.768 kHz.
508 //!
509 //! \return Returns the sub-second increment of the RTC added to the overall
510 //! value on every RTC clock tick.
511 //
512 //*****************************************************************************
513 __STATIC_INLINE uint32_t
AONRTCSubSecIncrGet(void)514 AONRTCSubSecIncrGet(void)
515 {
516 return(HWREG(AON_RTC_BASE + AON_RTC_O_SUBSECINC));
517 }
518
519 //*****************************************************************************
520 //
521 //! \brief Set operational mode of channel 1.
522 //!
523 //! Set the operational mode of channel 1. It can be capture or compare mode.
524 //! In capture mode, an external event causes the value of the free running
525 //! counter to be stored, to remember the time of the event.
526 //!
527 //! \note The default mode is compare.
528 //!
529 //! \param ui32Mode specifies the mode for channel 1.
530 //! The parameter must be one of the following:
531 //! - \ref AON_RTC_MODE_CH1_CAPTURE
532 //! - \ref AON_RTC_MODE_CH1_COMPARE
533 //!
534 //! \return None
535 //!
536 //! \sa AONRTCModeCh1Get()
537 //
538 //*****************************************************************************
539 __STATIC_INLINE void
AONRTCModeCh1Set(uint32_t ui32Mode)540 AONRTCModeCh1Set(uint32_t ui32Mode)
541 {
542 // Check the arguments.
543 ASSERT((ui32Mode == AON_RTC_MODE_CH1_CAPTURE) ||
544 (ui32Mode == AON_RTC_MODE_CH1_COMPARE));
545
546 HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH1_CAPT_EN_BITN) = ui32Mode;
547 }
548
549 //*****************************************************************************
550 //
551 //! \brief Get operational mode of channel 1.
552 //!
553 //! Get the operational mode of channel 1. It can be capture or compare mode.
554 //! In capture mode, an external event causes the value of the free running
555 //! counter to be stored, to remember the time of the event.
556 //!
557 //! \return Returns the operational mode of channel 1, one of:
558 //! - \ref AON_RTC_MODE_CH1_CAPTURE
559 //! - \ref AON_RTC_MODE_CH1_COMPARE
560 //!
561 //! \sa AONRTCModeCh1Set()
562 //
563 //*****************************************************************************
564 __STATIC_INLINE uint32_t
AONRTCModeCh1Get(void)565 AONRTCModeCh1Get(void)
566 {
567 return(HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH1_CAPT_EN_BITN));
568 }
569
570 //*****************************************************************************
571 //
572 //! \brief Set operational mode of channel 2.
573 //!
574 //! Set the operational mode of channel 2. It can be in continuous compare
575 //! mode or normal compare mode.
576 //! In continuous mode, a value is automatically incremented to the channel 2
577 //! compare register, upon a channel 2 compare event. This allows channel 2 to
578 //! generate a series of completely equidistant events.
579 //! The increment value is set by the AONRTCIncValueCh2Set() call.
580 //!
581 //! \note The default mode is normal compare.
582 //!
583 //! \param ui32Mode specifies the mode for channel 2.
584 //! The parameter must be one of the following:
585 //! - \ref AON_RTC_MODE_CH2_CONTINUOUS
586 //! - \ref AON_RTC_MODE_CH2_NORMALCOMPARE
587 //!
588 //! \return None
589 //!
590 //! \sa AONRTCIncValueCh2Set(), AONRTCIncValueCh2Get()
591 //
592 //*****************************************************************************
593 __STATIC_INLINE void
AONRTCModeCh2Set(uint32_t ui32Mode)594 AONRTCModeCh2Set(uint32_t ui32Mode)
595 {
596 // Check the arguments.
597 ASSERT((ui32Mode == AON_RTC_MODE_CH2_CONTINUOUS) ||
598 (ui32Mode == AON_RTC_MODE_CH2_NORMALCOMPARE));
599
600 HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH2_CONT_EN_BITN) = ui32Mode;
601 }
602
603 //*****************************************************************************
604 //
605 //! \brief Get operational mode of channel 2.
606 //!
607 //! Get the operational mode of channel 2. It can be in continuous compare
608 //! mode or normal compare mode.
609 //! In continuous mode, a value is automatically incremented to the channel 2
610 //! compare register, upon a channel 2 compare event. This allows channel 2 to
611 //! generate a series of completely equidistant events.
612 //! The increment value is set by the AONRTCIncValueCh2Set() call.
613 //!
614 //! \return Returns the operational mode of channel 2, i.e. one of:
615 //! - \ref AON_RTC_MODE_CH2_CONTINUOUS
616 //! - \ref AON_RTC_MODE_CH2_NORMALCOMPARE
617 //!
618 //! \sa AONRTCIncValueCh2Set(), AONRTCIncValueCh2Get()
619 //
620 //*****************************************************************************
621 __STATIC_INLINE uint32_t
AONRTCModeCh2Get(void)622 AONRTCModeCh2Get(void)
623 {
624 return(HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH2_CONT_EN_BITN));
625 }
626
627 //*****************************************************************************
628 //
629 //! \brief Enable event operation for the specified channel.
630 //!
631 //! Enable the event generation for the specified channel.
632 //!
633 //! \note The RTC free running clock must also be enabled globally using the
634 //! AONRTCEnable() call.
635 //!
636 //! \param ui32Channel specifies one or more channels to enable:
637 //! - \ref AON_RTC_CH0
638 //! - \ref AON_RTC_CH1
639 //! - \ref AON_RTC_CH2
640 //!
641 //! \return None
642 //!
643 //! \sa AONRTCEnable()
644 //
645 //*****************************************************************************
646 __STATIC_INLINE void
AONRTCChannelEnable(uint32_t ui32Channel)647 AONRTCChannelEnable(uint32_t ui32Channel)
648 {
649 // Check the arguments.
650 ASSERT((ui32Channel == AON_RTC_CH0) ||
651 (ui32Channel == AON_RTC_CH1) ||
652 (ui32Channel == AON_RTC_CH2));
653
654 if(ui32Channel & AON_RTC_CH0)
655 {
656 HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH0_EN_BITN) = 1;
657 }
658
659 if(ui32Channel & AON_RTC_CH1)
660 {
661 HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH1_EN_BITN) = 1;
662 }
663
664 if(ui32Channel & AON_RTC_CH2)
665 {
666 HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH2_EN_BITN) = 1;
667 }
668 }
669
670 //*****************************************************************************
671 //
672 //! \brief Disable event operation for the specified channel.
673 //!
674 //! Disable the event generation for the specified channel.
675 //!
676 //! \note The RTC free running clock can also be disabled globally using the
677 //! AONRTCDisable() call.
678 //!
679 //! \param ui32Channel specifies one or more channels to disable:
680 //! - \ref AON_RTC_CH0
681 //! - \ref AON_RTC_CH1
682 //! - \ref AON_RTC_CH2
683 //!
684 //! \return None
685 //!
686 //! \sa AONRTCDisable()
687 //
688 //*****************************************************************************
689 __STATIC_INLINE void
AONRTCChannelDisable(uint32_t ui32Channel)690 AONRTCChannelDisable(uint32_t ui32Channel)
691 {
692 // Check the arguments.
693 ASSERT((ui32Channel == AON_RTC_CH0) ||
694 (ui32Channel == AON_RTC_CH1) ||
695 (ui32Channel == AON_RTC_CH2));
696
697 if(ui32Channel & AON_RTC_CH0)
698 {
699 HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH0_EN_BITN) = 0;
700 }
701
702 if(ui32Channel & AON_RTC_CH1)
703 {
704 HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH1_EN_BITN) = 0;
705 }
706
707 if(ui32Channel & AON_RTC_CH2)
708 {
709 HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH2_EN_BITN) = 0;
710 }
711 }
712
713 //*****************************************************************************
714 //
715 //! \brief Set the compare value for the given channel.
716 //!
717 //! Set compare value for the specified channel.
718 //!
719 //! The format of the compare value is a 16 bit integer and 16 bit fractional
720 //! format <16 sec.16 subsec>. The current value of the RTC counter
721 //! can be retrieved in a format compatible to the compare register using
722 //! \ref AONRTCCurrentCompareValueGet()
723 //!
724 //! \param ui32Channel specifies one or more channels to set compare value for:
725 //! - \ref AON_RTC_CH0
726 //! - \ref AON_RTC_CH1
727 //! - \ref AON_RTC_CH2
728 //! \param ui32CompValue is the compare value to set for the specified channel.
729 //! - Format: <16 sec.16 subsec>
730 //!
731 //! \return None
732 //!
733 //! \sa AONRTCCurrentCompareValueGet()
734 //
735 //*****************************************************************************
736 __STATIC_INLINE void
AONRTCCompareValueSet(uint32_t ui32Channel,uint32_t ui32CompValue)737 AONRTCCompareValueSet(uint32_t ui32Channel, uint32_t ui32CompValue)
738 {
739 // Check the arguments.
740 ASSERT((ui32Channel == AON_RTC_CH0) ||
741 (ui32Channel == AON_RTC_CH1) ||
742 (ui32Channel == AON_RTC_CH2));
743
744 if(ui32Channel & AON_RTC_CH0)
745 {
746 HWREG(AON_RTC_BASE + AON_RTC_O_CH0CMP) = ui32CompValue;
747 }
748
749 if(ui32Channel & AON_RTC_CH1)
750 {
751 HWREG(AON_RTC_BASE + AON_RTC_O_CH1CMP) = ui32CompValue;
752 }
753
754 if(ui32Channel & AON_RTC_CH2)
755 {
756 HWREG(AON_RTC_BASE + AON_RTC_O_CH2CMP) = ui32CompValue;
757 }
758 }
759
760 //*****************************************************************************
761 //
762 //! \brief Get the compare value for the given channel.
763 //!
764 //! Get compare value for the specified channel.
765 //!
766 //! \param ui32Channel specifies a channel.
767 //! The parameter must be one (and only one) of the following:
768 //! - \ref AON_RTC_CH0
769 //! - \ref AON_RTC_CH1
770 //! - \ref AON_RTC_CH2
771 //!
772 //! \return Returns the stored compare value for the given channel.
773 //
774 //*****************************************************************************
775 __STATIC_INLINE uint32_t
AONRTCCompareValueGet(uint32_t ui32Channel)776 AONRTCCompareValueGet(uint32_t ui32Channel)
777 {
778 uint32_t ui32Value = 0;
779
780 // Check the arguments
781 ASSERT((ui32Channel == AON_RTC_CH0) ||
782 (ui32Channel == AON_RTC_CH1) ||
783 (ui32Channel == AON_RTC_CH2));
784
785 if(ui32Channel & AON_RTC_CH0)
786 {
787 ui32Value = HWREG(AON_RTC_BASE + AON_RTC_O_CH0CMP);
788 }
789
790 if(ui32Channel & AON_RTC_CH1)
791 {
792 ui32Value = HWREG(AON_RTC_BASE + AON_RTC_O_CH1CMP);
793 }
794
795 if(ui32Channel & AON_RTC_CH2)
796 {
797 ui32Value = HWREG(AON_RTC_BASE + AON_RTC_O_CH2CMP);
798 }
799
800 return(ui32Value);
801 }
802
803 //*****************************************************************************
804 //
805 //! \brief Get the current value of the RTC counter in a format that matches
806 //! RTC compare values.
807 //!
808 //! The compare value registers contains 16 integer and 16 fractional bits.
809 //! This function will return the current value of the RTC counter in an
810 //! identical format.
811 //!
812 //! \return Returns the current value of the RTC counter in a <16.16> format
813 //! (SEC[15:0].SUBSEC[31:16]).
814 //!
815 //! \sa \ref AONRTCCompareValueSet()
816 //
817 //*****************************************************************************
818 __STATIC_INLINE uint32_t
AONRTCCurrentCompareValueGet(void)819 AONRTCCurrentCompareValueGet( void )
820 {
821 return ( HWREG( AON_RTC_BASE + AON_RTC_O_TIME ));
822 }
823
824 //*****************************************************************************
825 //
826 //! \brief Get the current 64-bit value of the RTC counter.
827 //!
828 //! \note Reading SEC both before and after SUBSEC in order to detect if SEC
829 //! incremented while reading SUBSEC. If SEC incremented, we can't be sure
830 //! which SEC the SUBSEC belongs to, so repeating the sequence then.
831 //!
832 //! \return Returns the current value of the RTC counter in a 64-bits format
833 //! (SEC[31:0].SUBSEC[31:0]).
834 //
835 //*****************************************************************************
836 extern uint64_t AONRTCCurrent64BitValueGet(void);
837
838 //*****************************************************************************
839 //
840 //! \brief Set the channel 2 increment value when operating in continuous mode.
841 //!
842 //! Set the channel 2 increment value when operating in continuous mode.
843 //! The specified value is automatically incremented to the channel 2 compare
844 //! register, upon a channel 2 compare event. This allows channel 2 to generate
845 //! a series of completely equidistant events.
846 //!
847 //! \param ui32IncValue is the increment value when operating in continuous mode.
848 //!
849 //! \return None
850 //!
851 //! \sa AONRTCIncValueCh2Get()
852 //
853 //*****************************************************************************
854 __STATIC_INLINE void
AONRTCIncValueCh2Set(uint32_t ui32IncValue)855 AONRTCIncValueCh2Set(uint32_t ui32IncValue)
856 {
857 HWREG(AON_RTC_BASE + AON_RTC_O_CH2CMPINC) = ui32IncValue;
858 }
859
860 //*****************************************************************************
861 //
862 //! \brief Get the channel2 increment value when operating in continuous mode.
863 //!
864 //! Get the channel 2 increment value, when channel 2 is operating in
865 //! continuous mode.
866 //! This value is automatically incremented to the channel 2 compare
867 //! register, upon a channel 2 compare event. This allows channel 2 to
868 //! generate a series of completely equidistant events.
869 //!
870 //! \return Returns the channel 2 increment value when operating in continuous
871 //! mode.
872 //!
873 //! \sa AONRTCIncValueCh2Set()
874 //
875 //*****************************************************************************
876 __STATIC_INLINE uint32_t
AONRTCIncValueCh2Get(void)877 AONRTCIncValueCh2Get(void)
878 {
879 return(HWREG(AON_RTC_BASE + AON_RTC_O_CH2CMPINC));
880 }
881
882 //*****************************************************************************
883 //
884 //! \brief Get the channel 1 capture value.
885 //!
886 //! Get the channel 1 capture value.
887 //! The upper 16 bits of the returned value is the lower 16 bits of the
888 //! integer part of the RTC timer. The lower 16 bits of the returned part
889 //! is the upper 16 bits of the fractional part.
890 //!
891 //! \return Returns the channel 1 capture value.
892 //
893 //*****************************************************************************
894 __STATIC_INLINE uint32_t
AONRTCCaptureValueCh1Get(void)895 AONRTCCaptureValueCh1Get(void)
896 {
897 return(HWREG(AON_RTC_BASE + AON_RTC_O_CH1CAPT));
898 }
899
900 //*****************************************************************************
901 //
902 // Support for DriverLib in ROM:
903 // Redirect to implementation in ROM when available.
904 //
905 //*****************************************************************************
906 #if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
907 #include "../driverlib/rom.h"
908 #ifdef ROM_AONRTCCurrent64BitValueGet
909 #undef AONRTCCurrent64BitValueGet
910 #define AONRTCCurrent64BitValueGet ROM_AONRTCCurrent64BitValueGet
911 #endif
912 #endif
913
914 //*****************************************************************************
915 //
916 // Mark the end of the C bindings section for C++ compilers.
917 //
918 //*****************************************************************************
919 #ifdef __cplusplus
920 }
921 #endif
922
923 #endif // __AON_RTC_H__
924
925 //*****************************************************************************
926 //
927 //! Close the Doxygen group.
928 //! @}
929 //! @}
930 //
931 //*****************************************************************************
932