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Searched refs:baseAddr (Results 1 – 21 of 21) sorted by relevance

/hal_ti-3.4.0/simplelink/source/ti/drivers/uart/
DUARTCC32XX.c87 static unsigned int getPowerMgrId(unsigned int baseAddr);
186 MAP_UARTIntDisable(hwAttrs->baseAddr, UART_INT_TX | UART_INT_RX | in UARTCC32XX_close()
188 MAP_UARTDisable(hwAttrs->baseAddr); in UARTCC32XX_close()
216 hwAttrs->baseAddr); in UARTCC32XX_close()
248 DebugP_log1("UART:(%p) closed", hwAttrs->baseAddr); in UARTCC32XX_close()
272 DebugP_log2("UART:(%p) UART_CMD_PEEK: %d", hwAttrs->baseAddr, in UARTCC32XX_control()
278 DebugP_log2("UART:(%p) UART_CMD_ISAVAILABLE: %d", hwAttrs->baseAddr, in UARTCC32XX_control()
284 DebugP_log2("UART:(%p) UART_CMD_GETRXCOUNT: %d", hwAttrs->baseAddr, in UARTCC32XX_control()
291 MAP_UARTIntEnable(hwAttrs->baseAddr, UART_INT_RX | UART_INT_RT | in UARTCC32XX_control()
295 hwAttrs->baseAddr); in UARTCC32XX_control()
[all …]
DUARTCC32XXDMA.c108 static unsigned int getPowerMgrId(unsigned int baseAddr);
160 MAP_UARTDMADisable(hwAttrs->baseAddr, UART_DMA_TX | UART_DMA_RX); in UARTCC32XXDMA_close()
161 MAP_UARTDisable(hwAttrs->baseAddr); in UARTCC32XXDMA_close()
211 DebugP_log1("UART:(%p) closed", hwAttrs->baseAddr); in UARTCC32XXDMA_close()
226 *(bool *)arg = MAP_UARTBusy(hwAttrs->baseAddr); in UARTCC32XXDMA_control()
230 *(bool *)arg = MAP_UARTCharsAvail(hwAttrs->baseAddr); in UARTCC32XXDMA_control()
234 *(bool *)arg = MAP_UARTSpaceAvail(hwAttrs->baseAddr); in UARTCC32XXDMA_control()
239 hwAttrs->baseAddr, cmd); in UARTCC32XXDMA_control()
277 object->powerMgrId = getPowerMgrId(hwAttrs->baseAddr); in UARTCC32XXDMA_open()
280 hwAttrs->baseAddr); in UARTCC32XXDMA_open()
[all …]
DUARTCC32XXDMA.h267 unsigned int baseAddr; member
DUARTCC32XX.h294 unsigned int baseAddr; member
/hal_ti-3.4.0/simplelink/source/ti/drivers/sd/
DSDHostCC32XX.c145 static uint_fast32_t getPowerMgrId(uint_fast32_t baseAddr);
180 hwAttrs->baseAddr); in SDHostCC32XX_close()
185 MAP_SDHostIntDisable(hwAttrs->baseAddr, DATAERROR | CMDERROR); in SDHostCC32XX_close()
217 hwAttrs->baseAddr); in SDHostCC32XX_close()
248 " power constraint", hwAttrs->baseAddr); in SDHostCC32XX_getNumSectors()
254 " power constraint", hwAttrs->baseAddr); in SDHostCC32XX_getNumSectors()
261 MAP_SDHostRespGet(hwAttrs->baseAddr, (unsigned long *)resp); in SDHostCC32XX_getNumSectors()
292 " power constraint", hwAttrs->baseAddr); in SDHostCC32XX_getNumSectors()
319 " power constraint", hwAttrs->baseAddr); in SDHostCC32XX_initialize()
330 MAP_SDHostRespGet(hwAttrs->baseAddr, (unsigned long *)resp); in SDHostCC32XX_initialize()
[all …]
DSDHostCC32XX.h141 uint_fast32_t baseAddr; member
/hal_ti-3.4.0/simplelink/source/ti/drivers/camera/
DCameraCC32XXDMA.c124 DebugP_log1("Camera:(%p) DMA transfer enabled", hwAttrs->baseAddr); in CameraCC32XXDMA_configDMA()
130 MAP_CameraIntClear(hwAttrs->baseAddr, CAM_INT_DMA); in CameraCC32XXDMA_configDMA()
133 MAP_CameraIntEnable(hwAttrs->baseAddr, CAM_INT_DMA); in CameraCC32XXDMA_configDMA()
137 hwAttrs->baseAddr, in CameraCC32XXDMA_configDMA()
172 status = MAP_CameraIntStatus(hwAttrs->baseAddr); in CameraCC32XXDMA_hwiIntFxn()
175 hwAttrs->baseAddr,status); in CameraCC32XXDMA_hwiIntFxn()
177 MAP_CameraIntClear(hwAttrs->baseAddr, CAM_INT_FE); in CameraCC32XXDMA_hwiIntFxn()
181 hwAttrs->baseAddr, object->frameLength); in CameraCC32XXDMA_hwiIntFxn()
184 MAP_CameraCaptureStop(hwAttrs->baseAddr, true); in CameraCC32XXDMA_hwiIntFxn()
191 MAP_CameraIntClear(hwAttrs->baseAddr, CAM_INT_DMA); in CameraCC32XXDMA_hwiIntFxn()
[all …]
DCameraCC32XXDMA.h126 uint32_t baseAddr; member
/hal_ti-3.4.0/simplelink/source/ti/drivers/spi/
DSPICC32XXDMA.c187 UDMA_MODE_BASIC, buf, (void *) (hwAttrs->baseAddr + MCSPI_O_TX0), in configDMA()
211 UDMA_MODE_BASIC, (void *) (hwAttrs->baseAddr + MCSPI_O_RX0), buf, in configDMA()
234 MAP_SPIDmaEnable(hwAttrs->baseAddr, SPI_RX_DMA | SPI_TX_DMA); in configDMA()
235 MAP_SPIIntClear(hwAttrs->baseAddr, SPI_INT_DMARX); in configDMA()
236 MAP_SPIIntEnable(hwAttrs->baseAddr, SPI_INT_DMARX); in configDMA()
237 MAP_SPIWordCountSet(hwAttrs->baseAddr, object->currentXferAmt); in configDMA()
245 MAP_SPIEnable(hwAttrs->baseAddr); in configDMA()
246 MAP_SPICSEnable(hwAttrs->baseAddr); in configDMA()
265 static uint16_t getPowerMgrId(uint32_t baseAddr) in getPowerMgrId() argument
267 switch (baseAddr) { in getPowerMgrId()
[all …]
DSPICC32XXDMA.h311 uint32_t baseAddr; member
/hal_ti-3.4.0/simplelink/source/ti/drivers/watchdog/
DWatchdogCC32XX.c91 MAP_WatchdogUnlock(hwAttrs->baseAddr); in WatchdogCC32XX_initHardware()
92 MAP_WatchdogReloadSet(hwAttrs->baseAddr, object->reloadValue); in WatchdogCC32XX_initHardware()
93 MAP_WatchdogIntClear(hwAttrs->baseAddr); in WatchdogCC32XX_initHardware()
97 MAP_WatchdogStallEnable(hwAttrs->baseAddr); in WatchdogCC32XX_initHardware()
100 MAP_WatchdogStallDisable(hwAttrs->baseAddr); in WatchdogCC32XX_initHardware()
103 MAP_WatchdogEnable(hwAttrs->baseAddr); in WatchdogCC32XX_initHardware()
105 MAP_WatchdogLock(hwAttrs->baseAddr); in WatchdogCC32XX_initHardware()
128 MAP_WatchdogIntClear(hwAttrs->baseAddr); in WatchdogCC32XX_clear()
155 *(bool *)arg = MAP_WatchdogRunning(hwAttrs->baseAddr); in WatchdogCC32XX_control()
159 *(uint32_t *)arg = MAP_WatchdogValueGet(hwAttrs->baseAddr); in WatchdogCC32XX_control()
[all …]
DWatchdogCC32XX.h207 unsigned int baseAddr; /*!< Base address for Watchdog */ member
/hal_ti-3.4.0/simplelink/source/ti/drivers/i2c/
DI2CCC32XX.c140 I2CFIFODataPutNonBlocking(hwAttrs->baseAddr, *(object->writeBuf))) { in I2CCC32XX_fillTransmitFifo()
147 I2CMasterIntClearEx(hwAttrs->baseAddr, I2C_MASTER_INT_TX_FIFO_EMPTY); in I2CCC32XX_fillTransmitFifo()
171 MAP_I2CMasterIntDisableEx(hwAttrs->baseAddr, 0xFFFFFFFF); in I2CCC32XX_initHw()
177 MAP_I2CMasterInitExpClk(hwAttrs->baseAddr, freq.lo, in I2CCC32XX_initHw()
181 MAP_I2CTxFIFOFlush(hwAttrs->baseAddr); in I2CCC32XX_initHw()
182 MAP_I2CRxFIFOFlush(hwAttrs->baseAddr); in I2CCC32XX_initHw()
185 MAP_I2CTxFIFOConfigSet(hwAttrs->baseAddr, I2C_FIFO_CFG_TX_MASTER); in I2CCC32XX_initHw()
186 MAP_I2CRxFIFOConfigSet(hwAttrs->baseAddr, I2C_FIFO_CFG_RX_MASTER); in I2CCC32XX_initHw()
189 MAP_I2CMasterIntClearEx(hwAttrs->baseAddr, 0xFFFFFFFF); in I2CCC32XX_initHw()
218 I2CMasterIntDisableEx(hwAttrs->baseAddr, 0xFFFFFFFF); in I2CCC32XX_completeTransfer()
[all …]
DI2CCC32XX.h157 unsigned int baseAddr; member
/hal_ti-3.4.0/simplelink/source/ti/drivers/uart2/
DUART2CC32XX.c84 static uint_fast16_t getPowerMgrId(uint32_t baseAddr);
244 UARTIntDisable(hwAttrs->baseAddr, UART_INT_RX | UART_INT_RT | UART_INT_OE | in UART2CC32XX_close()
248 uartDmaDisable(hwAttrs->baseAddr, UART_DMA_TX | UART_DMA_RX); in UART2CC32XX_close()
249 MAP_UARTDisable(hwAttrs->baseAddr); in UART2CC32XX_close()
309 MAP_UARTRxErrorClear(hwAttrs->baseAddr); in UART2CC32XX_flushRx()
312 while (((int32_t)MAP_UARTCharGetNonBlocking(hwAttrs->baseAddr)) != -1); in UART2CC32XX_flushRx()
330 status = MAP_UARTIntStatus(hwAttrs->baseAddr, true); in UART2CC32XX_hwiIntFxn()
331 MAP_UARTIntClear(hwAttrs->baseAddr, status); in UART2CC32XX_hwiIntFxn()
336 UARTDMADisable(hwAttrs->baseAddr, UART_DMA_RX); in UART2CC32XX_hwiIntFxn()
343 errStatus = UARTRxErrorGet(hwAttrs->baseAddr); in UART2CC32XX_hwiIntFxn()
[all …]
DUART2CC32XX.h235 uint32_t baseAddr; member
/hal_ti-3.4.0/simplelink/source/ti/drivers/adc/
DADCCC32XX.c89 .baseAddr = ADC_BASE,
108 MAP_ADCChannelDisable(state.baseAddr, pin); in ADCCC32XX_close()
112 MAP_ADCDisable(state.baseAddr); in ADCCC32XX_close()
152 while (MAP_ADCFIFOLvlGet(state.baseAddr, adcChannel) == 0) { in ADCCC32XX_convert()
217 MAP_ADCEnable(state.baseAddr); in ADCCC32XX_open()
218 MAP_ADCChannelEnable(state.baseAddr, pin); in ADCCC32XX_open()
222 while (MAP_ADCFIFOLvlGet(state.baseAddr, pin) == 0){ in ADCCC32XX_open()
224 MAP_ADCFIFORead(state.baseAddr, pin); in ADCCC32XX_open()
DADCCC32XX.h101 uint_fast32_t baseAddr; member
/hal_ti-3.4.0/simplelink/source/ti/devices/msp432p4xx/driverlib/
Dgpio.c264 uint32_t baseAddr; in GPIO_getEnabledInterruptStatus() local
267 baseAddr = GPIO_PORT_TO_BASE[selectedPort]; in GPIO_getEnabledInterruptStatus()
269 ASSERT(baseAddr != 0xFFFF); in GPIO_getEnabledInterruptStatus()
278 return (HWREG8(baseAddr + OFS_LIB_P1IE) & pendingInts); in GPIO_getEnabledInterruptStatus()
284 return (HWREG8(baseAddr + OFS_LIB_P2IE) & pendingInts); in GPIO_getEnabledInterruptStatus()
286 return (HWREG16(baseAddr + OFS_LIB_PAIE) & pendingInts); in GPIO_getEnabledInterruptStatus()
296 uint32_t baseAddr; in GPIO_setDriveStrengthHigh() local
298 baseAddr = GPIO_PORT_TO_BASE[selectedPort]; in GPIO_setDriveStrengthHigh()
300 HWREG8(baseAddr + OFS_LIB_PADS) |= selectedPins; in GPIO_setDriveStrengthHigh()
307 uint32_t baseAddr; in GPIO_setDriveStrengthLow() local
[all …]
/hal_ti-3.4.0/simplelink/source/ti/drivers/net/wifi/porting/
DCC3220SF_LAUNCHXL.c35 .baseAddr = LSPI_BASE,
54 .baseAddr = GSPI_BASE,
/hal_ti-3.4.0/simplelink/source/ti/drivers/pwm/
DPWMTimerCC32XX.c238 static uint_fast16_t getPowerMgrId(uint32_t baseAddr) in getPowerMgrId() argument
240 switch (baseAddr) { in getPowerMgrId()