Lines Matching refs:baseAddr

108 static unsigned int getPowerMgrId(unsigned int baseAddr);
160 MAP_UARTDMADisable(hwAttrs->baseAddr, UART_DMA_TX | UART_DMA_RX); in UARTCC32XXDMA_close()
161 MAP_UARTDisable(hwAttrs->baseAddr); in UARTCC32XXDMA_close()
211 DebugP_log1("UART:(%p) closed", hwAttrs->baseAddr); in UARTCC32XXDMA_close()
226 *(bool *)arg = MAP_UARTBusy(hwAttrs->baseAddr); in UARTCC32XXDMA_control()
230 *(bool *)arg = MAP_UARTCharsAvail(hwAttrs->baseAddr); in UARTCC32XXDMA_control()
234 *(bool *)arg = MAP_UARTSpaceAvail(hwAttrs->baseAddr); in UARTCC32XXDMA_control()
239 hwAttrs->baseAddr, cmd); in UARTCC32XXDMA_control()
277 object->powerMgrId = getPowerMgrId(hwAttrs->baseAddr); in UARTCC32XXDMA_open()
280 hwAttrs->baseAddr); in UARTCC32XXDMA_open()
291 DebugP_log1("UART:(%p) already in use.", hwAttrs->baseAddr); in UARTCC32XXDMA_open()
342 DebugP_log1("UART:(%p) UDMACC32XX_open() failed.", hwAttrs->baseAddr); in UARTCC32XXDMA_open()
394 DebugP_log1("UART:(%p) HwiP_create() failed", hwAttrs->baseAddr); in UARTCC32XXDMA_open()
400 MAP_UARTIntDisable(hwAttrs->baseAddr, in UARTCC32XXDMA_open()
414 hwAttrs->baseAddr); in UARTCC32XXDMA_open()
426 hwAttrs->baseAddr); in UARTCC32XXDMA_open()
444 hwAttrs->baseAddr); in UARTCC32XXDMA_open()
452 DebugP_log1("UART:(%p) opened", hwAttrs->baseAddr); in UARTCC32XXDMA_open()
469 ((UARTCC32XXDMA_HWAttrsV1 const *)(handle->hwAttrs))->baseAddr); in UARTCC32XXDMA_read()
480 ((UARTCC32XXDMA_HWAttrsV1 const *)(handle->hwAttrs))->baseAddr); in UARTCC32XXDMA_read()
528 ((UARTCC32XXDMA_HWAttrsV1 const *)(handle->hwAttrs))->baseAddr, in UARTCC32XXDMA_read()
551 *buffer = MAP_UARTCharGet(hwAttrs->baseAddr); in UARTCC32XXDMA_readPolling()
553 hwAttrs->baseAddr, *buffer); in UARTCC32XXDMA_readPolling()
560 MAP_UARTCharPut(hwAttrs->baseAddr, '\r'); in UARTCC32XXDMA_readPolling()
567 MAP_UARTCharPut(hwAttrs->baseAddr, *buffer); in UARTCC32XXDMA_readPolling()
580 hwAttrs->baseAddr, count); in UARTCC32XXDMA_readPolling()
609 ((UARTCC32XXDMA_HWAttrsV1 const *)(handle->hwAttrs))->baseAddr); in UARTCC32XXDMA_readCancel()
624 DebugP_log1("UART:(%p) Data size too large.", hwAttrs->baseAddr); in UARTCC32XXDMA_write()
631 if (object->writeSize || UARTBusy(hwAttrs->baseAddr)) { in UARTCC32XXDMA_write()
634 ((UARTCC32XXDMA_HWAttrsV1 const *)(handle->hwAttrs))->baseAddr); in UARTCC32XXDMA_write()
674 ((UARTCC32XXDMA_HWAttrsV1 const *)(handle->hwAttrs))->baseAddr, in UARTCC32XXDMA_write()
698 MAP_UARTCharPut(hwAttrs->baseAddr, '\r'); in UARTCC32XXDMA_writePolling()
701 MAP_UARTCharPut(hwAttrs->baseAddr, *buffer); in UARTCC32XXDMA_writePolling()
704 ((UARTCC32XXDMA_HWAttrsV1 const *)(handle->hwAttrs))->baseAddr, in UARTCC32XXDMA_writePolling()
712 ((UARTCC32XXDMA_HWAttrsV1 const *)(handle->hwAttrs))->baseAddr, in UARTCC32XXDMA_writePolling()
743 ((UARTCC32XXDMA_HWAttrsV1 const *)(handle->hwAttrs))->baseAddr, in UARTCC32XXDMA_writeCancel()
767 (void *)(hwAttrs->baseAddr + UART_O_DR), in UARTCC32XXDMA_configDMA()
777 MAP_UARTIntClear(hwAttrs->baseAddr, UART_INT_DMATX); in UARTCC32XXDMA_configDMA()
778 MAP_UARTIntEnable(hwAttrs->baseAddr, UART_INT_DMATX); in UARTCC32XXDMA_configDMA()
789 (void *)(hwAttrs->baseAddr + UART_O_DR), in UARTCC32XXDMA_configDMA()
796 MAP_UARTIntClear(hwAttrs->baseAddr, UART_INT_DMARX); in UARTCC32XXDMA_configDMA()
797 MAP_UARTIntEnable(hwAttrs->baseAddr, UART_INT_DMARX); in UARTCC32XXDMA_configDMA()
800 DebugP_log1("UART:(%p) DMA transfer enabled", hwAttrs->baseAddr); in UARTCC32XXDMA_configDMA()
804 hwAttrs->baseAddr, (uintptr_t)(object->writeBuf), in UARTCC32XXDMA_configDMA()
809 hwAttrs->baseAddr, (uintptr_t)(object->readBuf), in UARTCC32XXDMA_configDMA()
835 status = MAP_UARTIntStatus(hwAttrs->baseAddr, false); in UARTCC32XXDMA_hwiIntFxn()
837 MAP_UARTIntDisable(hwAttrs->baseAddr, UART_INT_DMATX); in UARTCC32XXDMA_hwiIntFxn()
838 MAP_UARTIntClear(hwAttrs->baseAddr, UART_INT_DMATX); in UARTCC32XXDMA_hwiIntFxn()
842 MAP_UARTIntDisable(hwAttrs->baseAddr, UART_INT_DMARX); in UARTCC32XXDMA_hwiIntFxn()
843 MAP_UARTIntClear(hwAttrs->baseAddr, UART_INT_DMARX); in UARTCC32XXDMA_hwiIntFxn()
847 hwAttrs->baseAddr, status); in UARTCC32XXDMA_hwiIntFxn()
860 hwAttrs->baseAddr, object->readCount); in UARTCC32XXDMA_hwiIntFxn()
877 hwAttrs->baseAddr, object->writeCount); in UARTCC32XXDMA_hwiIntFxn()
884 static unsigned int getPowerMgrId(unsigned int baseAddr) in getPowerMgrId() argument
886 switch (baseAddr) { in getPowerMgrId()
914 MAP_UARTFIFOLevelSet(hwAttrs->baseAddr, UART_FIFO_TX4_8, UART_FIFO_RX4_8); in initHw()
918 MAP_UARTFlowControlSet(hwAttrs->baseAddr, in initHw()
922 MAP_UARTFlowControlSet(hwAttrs->baseAddr, UART_FLOWCONTROL_NONE); in initHw()
926 MAP_UARTConfigSetExpClk(hwAttrs->baseAddr, in initHw()
933 MAP_UARTDMAEnable(hwAttrs->baseAddr, UART_DMA_TX | UART_DMA_RX); in initHw()
941 MAP_UARTEnable(hwAttrs->baseAddr); in initHw()
1123 while (MAP_UARTBusy(hwAttrs->baseAddr)); in writeFinishedDoCallback()
1132 hwAttrs->baseAddr, object->writeCount); in writeFinishedDoCallback()