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Searched refs:tmpbdtr (Results 1 – 25 of 44) sorted by relevance

12

/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/src/
Dstm32mp1xx_hal_tim_ex.c1717 uint32_t tmpbdtr = 0U; in HAL_TIMEx_ConfigBreakDeadTime() local
1737 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime); in HAL_TIMEx_ConfigBreakDeadTime()
1738 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); in HAL_TIMEx_ConfigBreakDeadTime()
1739 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); in HAL_TIMEx_ConfigBreakDeadTime()
1740 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); in HAL_TIMEx_ConfigBreakDeadTime()
1741 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); in HAL_TIMEx_ConfigBreakDeadTime()
1742 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); in HAL_TIMEx_ConfigBreakDeadTime()
1743 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); in HAL_TIMEx_ConfigBreakDeadTime()
1744 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos)); in HAL_TIMEx_ConfigBreakDeadTime()
1752 MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, sBreakDeadTimeConfig->BreakAFMode); in HAL_TIMEx_ConfigBreakDeadTime()
[all …]
Dstm32mp1xx_ll_tim.c754 uint32_t tmpbdtr = 0; in LL_TIM_BDTR_Init() local
769 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, TIM_BDTRInitStruct->DeadTime); in LL_TIM_BDTR_Init()
770 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, TIM_BDTRInitStruct->LockLevel); in LL_TIM_BDTR_Init()
771 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, TIM_BDTRInitStruct->OSSIState); in LL_TIM_BDTR_Init()
772 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, TIM_BDTRInitStruct->OSSRState); in LL_TIM_BDTR_Init()
773 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); in LL_TIM_BDTR_Init()
774 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, TIM_BDTRInitStruct->BreakPolarity); in LL_TIM_BDTR_Init()
775 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, TIM_BDTRInitStruct->AutomaticOutput); in LL_TIM_BDTR_Init()
776 MODIFY_REG(tmpbdtr, TIM_BDTR_MOE, TIM_BDTRInitStruct->AutomaticOutput); in LL_TIM_BDTR_Init()
781 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, TIM_BDTRInitStruct->BreakFilter); in LL_TIM_BDTR_Init()
[all …]
/hal_stm32-latest/stm32cube/stm32wb0x/drivers/src/
Dstm32wb0x_hal_tim_ex.c1362 uint32_t tmpbdtr = 0U; in HAL_TIMEx_ConfigBreakDeadTime() local
1387 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime); in HAL_TIMEx_ConfigBreakDeadTime()
1388 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); in HAL_TIMEx_ConfigBreakDeadTime()
1389 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); in HAL_TIMEx_ConfigBreakDeadTime()
1390 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); in HAL_TIMEx_ConfigBreakDeadTime()
1391 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); in HAL_TIMEx_ConfigBreakDeadTime()
1392 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); in HAL_TIMEx_ConfigBreakDeadTime()
1393 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); in HAL_TIMEx_ConfigBreakDeadTime()
1395 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos)); in HAL_TIMEx_ConfigBreakDeadTime()
1398 MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, sBreakDeadTimeConfig->BreakAFMode); in HAL_TIMEx_ConfigBreakDeadTime()
[all …]
Dstm32wb0x_ll_tim.c603 uint32_t tmpbdtr = 0; in LL_TIM_BDTR_Init() local
624 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, TIM_BDTRInitStruct->DeadTime); in LL_TIM_BDTR_Init()
625 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, TIM_BDTRInitStruct->LockLevel); in LL_TIM_BDTR_Init()
626 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, TIM_BDTRInitStruct->OSSIState); in LL_TIM_BDTR_Init()
627 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, TIM_BDTRInitStruct->OSSRState); in LL_TIM_BDTR_Init()
628 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); in LL_TIM_BDTR_Init()
629 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, TIM_BDTRInitStruct->BreakPolarity); in LL_TIM_BDTR_Init()
630 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, TIM_BDTRInitStruct->AutomaticOutput); in LL_TIM_BDTR_Init()
632 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, TIM_BDTRInitStruct->BreakFilter); in LL_TIM_BDTR_Init()
635 MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, TIM_BDTRInitStruct->BreakAFMode); in LL_TIM_BDTR_Init()
[all …]
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_hal_tim_ex.c2044 uint32_t tmpbdtr = 0U; in HAL_TIMEx_ConfigBreakDeadTime() local
2065 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime); in HAL_TIMEx_ConfigBreakDeadTime()
2066 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); in HAL_TIMEx_ConfigBreakDeadTime()
2067 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); in HAL_TIMEx_ConfigBreakDeadTime()
2068 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); in HAL_TIMEx_ConfigBreakDeadTime()
2069 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); in HAL_TIMEx_ConfigBreakDeadTime()
2070 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); in HAL_TIMEx_ConfigBreakDeadTime()
2071 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); in HAL_TIMEx_ConfigBreakDeadTime()
2072 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos)); in HAL_TIMEx_ConfigBreakDeadTime()
2073 MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, sBreakDeadTimeConfig->BreakAFMode); in HAL_TIMEx_ConfigBreakDeadTime()
[all …]
Dstm32l5xx_ll_tim.c722 uint32_t tmpbdtr = 0; in LL_TIM_BDTR_Init() local
739 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, TIM_BDTRInitStruct->DeadTime); in LL_TIM_BDTR_Init()
740 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, TIM_BDTRInitStruct->LockLevel); in LL_TIM_BDTR_Init()
741 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, TIM_BDTRInitStruct->OSSIState); in LL_TIM_BDTR_Init()
742 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, TIM_BDTRInitStruct->OSSRState); in LL_TIM_BDTR_Init()
743 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); in LL_TIM_BDTR_Init()
744 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, TIM_BDTRInitStruct->BreakPolarity); in LL_TIM_BDTR_Init()
745 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, TIM_BDTRInitStruct->AutomaticOutput); in LL_TIM_BDTR_Init()
746 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, TIM_BDTRInitStruct->BreakFilter); in LL_TIM_BDTR_Init()
747 MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, TIM_BDTRInitStruct->BreakAFMode); in LL_TIM_BDTR_Init()
[all …]
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/src/
Dstm32u0xx_hal_tim_ex.c2046 uint32_t tmpbdtr = 0U; in HAL_TIMEx_ConfigBreakDeadTime() local
2067 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime); in HAL_TIMEx_ConfigBreakDeadTime()
2068 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); in HAL_TIMEx_ConfigBreakDeadTime()
2069 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); in HAL_TIMEx_ConfigBreakDeadTime()
2070 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); in HAL_TIMEx_ConfigBreakDeadTime()
2071 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); in HAL_TIMEx_ConfigBreakDeadTime()
2072 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); in HAL_TIMEx_ConfigBreakDeadTime()
2073 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); in HAL_TIMEx_ConfigBreakDeadTime()
2074 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos)); in HAL_TIMEx_ConfigBreakDeadTime()
2075 MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, sBreakDeadTimeConfig->BreakAFMode); in HAL_TIMEx_ConfigBreakDeadTime()
[all …]
Dstm32u0xx_ll_tim.c708 uint32_t tmpbdtr = 0; in LL_TIM_BDTR_Init() local
725 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, TIM_BDTRInitStruct->DeadTime); in LL_TIM_BDTR_Init()
726 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, TIM_BDTRInitStruct->LockLevel); in LL_TIM_BDTR_Init()
727 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, TIM_BDTRInitStruct->OSSIState); in LL_TIM_BDTR_Init()
728 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, TIM_BDTRInitStruct->OSSRState); in LL_TIM_BDTR_Init()
729 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); in LL_TIM_BDTR_Init()
730 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, TIM_BDTRInitStruct->BreakPolarity); in LL_TIM_BDTR_Init()
731 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, TIM_BDTRInitStruct->AutomaticOutput); in LL_TIM_BDTR_Init()
732 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, TIM_BDTRInitStruct->BreakFilter); in LL_TIM_BDTR_Init()
733 MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, TIM_BDTRInitStruct->BreakAFMode); in LL_TIM_BDTR_Init()
[all …]
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/src/
Dstm32c0xx_hal_tim_ex.c2076 uint32_t tmpbdtr = 0U; in HAL_TIMEx_ConfigBreakDeadTime() local
2097 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime); in HAL_TIMEx_ConfigBreakDeadTime()
2098 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); in HAL_TIMEx_ConfigBreakDeadTime()
2099 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); in HAL_TIMEx_ConfigBreakDeadTime()
2100 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); in HAL_TIMEx_ConfigBreakDeadTime()
2101 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); in HAL_TIMEx_ConfigBreakDeadTime()
2102 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); in HAL_TIMEx_ConfigBreakDeadTime()
2103 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); in HAL_TIMEx_ConfigBreakDeadTime()
2104 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos)); in HAL_TIMEx_ConfigBreakDeadTime()
2105 MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, sBreakDeadTimeConfig->BreakAFMode); in HAL_TIMEx_ConfigBreakDeadTime()
[all …]
Dstm32c0xx_ll_tim.c699 uint32_t tmpbdtr = 0; in LL_TIM_BDTR_Init() local
716 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, TIM_BDTRInitStruct->DeadTime); in LL_TIM_BDTR_Init()
717 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, TIM_BDTRInitStruct->LockLevel); in LL_TIM_BDTR_Init()
718 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, TIM_BDTRInitStruct->OSSIState); in LL_TIM_BDTR_Init()
719 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, TIM_BDTRInitStruct->OSSRState); in LL_TIM_BDTR_Init()
720 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); in LL_TIM_BDTR_Init()
721 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, TIM_BDTRInitStruct->BreakPolarity); in LL_TIM_BDTR_Init()
722 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, TIM_BDTRInitStruct->AutomaticOutput); in LL_TIM_BDTR_Init()
723 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, TIM_BDTRInitStruct->BreakFilter); in LL_TIM_BDTR_Init()
724 MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, TIM_BDTRInitStruct->BreakAFMode); in LL_TIM_BDTR_Init()
[all …]
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/src/
Dstm32wbxx_hal_tim_ex.c2070 uint32_t tmpbdtr = 0U; in HAL_TIMEx_ConfigBreakDeadTime() local
2091 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime); in HAL_TIMEx_ConfigBreakDeadTime()
2092 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); in HAL_TIMEx_ConfigBreakDeadTime()
2093 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); in HAL_TIMEx_ConfigBreakDeadTime()
2094 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); in HAL_TIMEx_ConfigBreakDeadTime()
2095 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); in HAL_TIMEx_ConfigBreakDeadTime()
2096 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); in HAL_TIMEx_ConfigBreakDeadTime()
2097 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); in HAL_TIMEx_ConfigBreakDeadTime()
2098 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos)); in HAL_TIMEx_ConfigBreakDeadTime()
2099 MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, sBreakDeadTimeConfig->BreakAFMode); in HAL_TIMEx_ConfigBreakDeadTime()
[all …]
Dstm32wbxx_ll_tim.c691 uint32_t tmpbdtr = 0; in LL_TIM_BDTR_Init() local
708 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, TIM_BDTRInitStruct->DeadTime); in LL_TIM_BDTR_Init()
709 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, TIM_BDTRInitStruct->LockLevel); in LL_TIM_BDTR_Init()
710 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, TIM_BDTRInitStruct->OSSIState); in LL_TIM_BDTR_Init()
711 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, TIM_BDTRInitStruct->OSSRState); in LL_TIM_BDTR_Init()
712 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); in LL_TIM_BDTR_Init()
713 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, TIM_BDTRInitStruct->BreakPolarity); in LL_TIM_BDTR_Init()
714 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, TIM_BDTRInitStruct->AutomaticOutput); in LL_TIM_BDTR_Init()
715 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, TIM_BDTRInitStruct->BreakFilter); in LL_TIM_BDTR_Init()
716 MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, TIM_BDTRInitStruct->BreakAFMode); in LL_TIM_BDTR_Init()
[all …]
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_tim_ex.c2065 uint32_t tmpbdtr = 0U; in HAL_TIMEx_ConfigBreakDeadTime() local
2088 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime); in HAL_TIMEx_ConfigBreakDeadTime()
2089 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); in HAL_TIMEx_ConfigBreakDeadTime()
2090 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); in HAL_TIMEx_ConfigBreakDeadTime()
2091 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); in HAL_TIMEx_ConfigBreakDeadTime()
2092 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); in HAL_TIMEx_ConfigBreakDeadTime()
2093 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); in HAL_TIMEx_ConfigBreakDeadTime()
2094 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); in HAL_TIMEx_ConfigBreakDeadTime()
2095 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos)); in HAL_TIMEx_ConfigBreakDeadTime()
2097 MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, sBreakDeadTimeConfig->BreakAFMode); in HAL_TIMEx_ConfigBreakDeadTime()
[all …]
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/src/
Dstm32wlxx_hal_tim_ex.c2067 uint32_t tmpbdtr = 0U; in HAL_TIMEx_ConfigBreakDeadTime() local
2087 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime); in HAL_TIMEx_ConfigBreakDeadTime()
2088 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); in HAL_TIMEx_ConfigBreakDeadTime()
2089 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); in HAL_TIMEx_ConfigBreakDeadTime()
2090 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); in HAL_TIMEx_ConfigBreakDeadTime()
2091 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); in HAL_TIMEx_ConfigBreakDeadTime()
2092 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); in HAL_TIMEx_ConfigBreakDeadTime()
2093 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); in HAL_TIMEx_ConfigBreakDeadTime()
2094 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos)); in HAL_TIMEx_ConfigBreakDeadTime()
2102 MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, sBreakDeadTimeConfig->BreakAFMode); in HAL_TIMEx_ConfigBreakDeadTime()
[all …]
Dstm32wlxx_ll_tim.c687 uint32_t tmpbdtr = 0; in LL_TIM_BDTR_Init() local
702 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, TIM_BDTRInitStruct->DeadTime); in LL_TIM_BDTR_Init()
703 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, TIM_BDTRInitStruct->LockLevel); in LL_TIM_BDTR_Init()
704 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, TIM_BDTRInitStruct->OSSIState); in LL_TIM_BDTR_Init()
705 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, TIM_BDTRInitStruct->OSSRState); in LL_TIM_BDTR_Init()
706 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); in LL_TIM_BDTR_Init()
707 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, TIM_BDTRInitStruct->BreakPolarity); in LL_TIM_BDTR_Init()
708 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, TIM_BDTRInitStruct->AutomaticOutput); in LL_TIM_BDTR_Init()
709 MODIFY_REG(tmpbdtr, TIM_BDTR_MOE, TIM_BDTRInitStruct->AutomaticOutput); in LL_TIM_BDTR_Init()
712 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, TIM_BDTRInitStruct->BreakFilter); in LL_TIM_BDTR_Init()
[all …]
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/src/
Dstm32g0xx_hal_tim_ex.c2046 uint32_t tmpbdtr = 0U; in HAL_TIMEx_ConfigBreakDeadTime() local
2067 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime); in HAL_TIMEx_ConfigBreakDeadTime()
2068 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); in HAL_TIMEx_ConfigBreakDeadTime()
2069 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); in HAL_TIMEx_ConfigBreakDeadTime()
2070 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); in HAL_TIMEx_ConfigBreakDeadTime()
2071 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); in HAL_TIMEx_ConfigBreakDeadTime()
2072 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); in HAL_TIMEx_ConfigBreakDeadTime()
2073 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); in HAL_TIMEx_ConfigBreakDeadTime()
2074 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos)); in HAL_TIMEx_ConfigBreakDeadTime()
2075 MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, sBreakDeadTimeConfig->BreakAFMode); in HAL_TIMEx_ConfigBreakDeadTime()
[all …]
Dstm32g0xx_ll_tim.c731 uint32_t tmpbdtr = 0; in LL_TIM_BDTR_Init() local
748 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, TIM_BDTRInitStruct->DeadTime); in LL_TIM_BDTR_Init()
749 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, TIM_BDTRInitStruct->LockLevel); in LL_TIM_BDTR_Init()
750 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, TIM_BDTRInitStruct->OSSIState); in LL_TIM_BDTR_Init()
751 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, TIM_BDTRInitStruct->OSSRState); in LL_TIM_BDTR_Init()
752 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); in LL_TIM_BDTR_Init()
753 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, TIM_BDTRInitStruct->BreakPolarity); in LL_TIM_BDTR_Init()
754 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, TIM_BDTRInitStruct->AutomaticOutput); in LL_TIM_BDTR_Init()
755 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, TIM_BDTRInitStruct->BreakFilter); in LL_TIM_BDTR_Init()
756 MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, TIM_BDTRInitStruct->BreakAFMode); in LL_TIM_BDTR_Init()
[all …]
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_tim_ex.c2178 uint32_t tmpbdtr = 0U; in HAL_TIMEx_ConfigBreakDeadTime() local
2199 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime); in HAL_TIMEx_ConfigBreakDeadTime()
2200 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); in HAL_TIMEx_ConfigBreakDeadTime()
2201 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); in HAL_TIMEx_ConfigBreakDeadTime()
2202 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); in HAL_TIMEx_ConfigBreakDeadTime()
2203 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); in HAL_TIMEx_ConfigBreakDeadTime()
2204 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); in HAL_TIMEx_ConfigBreakDeadTime()
2205 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); in HAL_TIMEx_ConfigBreakDeadTime()
2206 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos)); in HAL_TIMEx_ConfigBreakDeadTime()
2207 MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, sBreakDeadTimeConfig->BreakAFMode); in HAL_TIMEx_ConfigBreakDeadTime()
[all …]
Dstm32h7rsxx_ll_tim.c745 uint32_t tmpbdtr = 0; in LL_TIM_BDTR_Init() local
762 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, TIM_BDTRInitStruct->DeadTime); in LL_TIM_BDTR_Init()
763 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, TIM_BDTRInitStruct->LockLevel); in LL_TIM_BDTR_Init()
764 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, TIM_BDTRInitStruct->OSSIState); in LL_TIM_BDTR_Init()
765 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, TIM_BDTRInitStruct->OSSRState); in LL_TIM_BDTR_Init()
766 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); in LL_TIM_BDTR_Init()
767 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, TIM_BDTRInitStruct->BreakPolarity); in LL_TIM_BDTR_Init()
768 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, TIM_BDTRInitStruct->AutomaticOutput); in LL_TIM_BDTR_Init()
769 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, TIM_BDTRInitStruct->BreakFilter); in LL_TIM_BDTR_Init()
770 MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, TIM_BDTRInitStruct->BreakAFMode); in LL_TIM_BDTR_Init()
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/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_tim_ex.c2179 uint32_t tmpbdtr = 0U; in HAL_TIMEx_ConfigBreakDeadTime() local
2200 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime); in HAL_TIMEx_ConfigBreakDeadTime()
2201 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); in HAL_TIMEx_ConfigBreakDeadTime()
2202 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); in HAL_TIMEx_ConfigBreakDeadTime()
2203 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); in HAL_TIMEx_ConfigBreakDeadTime()
2204 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); in HAL_TIMEx_ConfigBreakDeadTime()
2205 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); in HAL_TIMEx_ConfigBreakDeadTime()
2206 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); in HAL_TIMEx_ConfigBreakDeadTime()
2207 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos)); in HAL_TIMEx_ConfigBreakDeadTime()
2208 MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, sBreakDeadTimeConfig->BreakAFMode); in HAL_TIMEx_ConfigBreakDeadTime()
[all …]
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_tim_ex.c2178 uint32_t tmpbdtr = 0U; in HAL_TIMEx_ConfigBreakDeadTime() local
2199 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime); in HAL_TIMEx_ConfigBreakDeadTime()
2200 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); in HAL_TIMEx_ConfigBreakDeadTime()
2201 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); in HAL_TIMEx_ConfigBreakDeadTime()
2202 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); in HAL_TIMEx_ConfigBreakDeadTime()
2203 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); in HAL_TIMEx_ConfigBreakDeadTime()
2204 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); in HAL_TIMEx_ConfigBreakDeadTime()
2205 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); in HAL_TIMEx_ConfigBreakDeadTime()
2206 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos)); in HAL_TIMEx_ConfigBreakDeadTime()
2207 MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, sBreakDeadTimeConfig->BreakAFMode); in HAL_TIMEx_ConfigBreakDeadTime()
[all …]
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_tim_ex.c2158 uint32_t tmpbdtr = 0U; in HAL_TIMEx_ConfigBreakDeadTime() local
2179 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime); in HAL_TIMEx_ConfigBreakDeadTime()
2180 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); in HAL_TIMEx_ConfigBreakDeadTime()
2181 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); in HAL_TIMEx_ConfigBreakDeadTime()
2182 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); in HAL_TIMEx_ConfigBreakDeadTime()
2183 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); in HAL_TIMEx_ConfigBreakDeadTime()
2184 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); in HAL_TIMEx_ConfigBreakDeadTime()
2185 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); in HAL_TIMEx_ConfigBreakDeadTime()
2186 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos)); in HAL_TIMEx_ConfigBreakDeadTime()
2187 MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, sBreakDeadTimeConfig->BreakAFMode); in HAL_TIMEx_ConfigBreakDeadTime()
[all …]
Dstm32wbaxx_ll_tim.c704 uint32_t tmpbdtr = 0; in LL_TIM_BDTR_Init() local
721 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, TIM_BDTRInitStruct->DeadTime); in LL_TIM_BDTR_Init()
722 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, TIM_BDTRInitStruct->LockLevel); in LL_TIM_BDTR_Init()
723 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, TIM_BDTRInitStruct->OSSIState); in LL_TIM_BDTR_Init()
724 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, TIM_BDTRInitStruct->OSSRState); in LL_TIM_BDTR_Init()
725 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); in LL_TIM_BDTR_Init()
726 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, TIM_BDTRInitStruct->BreakPolarity); in LL_TIM_BDTR_Init()
727 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, TIM_BDTRInitStruct->AutomaticOutput); in LL_TIM_BDTR_Init()
728 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, TIM_BDTRInitStruct->BreakFilter); in LL_TIM_BDTR_Init()
729 MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, TIM_BDTRInitStruct->BreakAFMode); in LL_TIM_BDTR_Init()
[all …]
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_tim_ex.c2176 uint32_t tmpbdtr = 0U; in HAL_TIMEx_ConfigBreakDeadTime() local
2197 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime); in HAL_TIMEx_ConfigBreakDeadTime()
2198 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); in HAL_TIMEx_ConfigBreakDeadTime()
2199 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); in HAL_TIMEx_ConfigBreakDeadTime()
2200 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); in HAL_TIMEx_ConfigBreakDeadTime()
2201 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); in HAL_TIMEx_ConfigBreakDeadTime()
2202 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); in HAL_TIMEx_ConfigBreakDeadTime()
2203 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); in HAL_TIMEx_ConfigBreakDeadTime()
2204 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos)); in HAL_TIMEx_ConfigBreakDeadTime()
2205 MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, sBreakDeadTimeConfig->BreakAFMode); in HAL_TIMEx_ConfigBreakDeadTime()
[all …]
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_hal_tim_ex.c2257 uint32_t tmpbdtr = 0U; in HAL_TIMEx_ConfigBreakDeadTime() local
2278 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime); in HAL_TIMEx_ConfigBreakDeadTime()
2279 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); in HAL_TIMEx_ConfigBreakDeadTime()
2280 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); in HAL_TIMEx_ConfigBreakDeadTime()
2281 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); in HAL_TIMEx_ConfigBreakDeadTime()
2282 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); in HAL_TIMEx_ConfigBreakDeadTime()
2283 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); in HAL_TIMEx_ConfigBreakDeadTime()
2284 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); in HAL_TIMEx_ConfigBreakDeadTime()
2285 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos)); in HAL_TIMEx_ConfigBreakDeadTime()
2286 MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, sBreakDeadTimeConfig->BreakAFMode); in HAL_TIMEx_ConfigBreakDeadTime()
[all …]

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