Lines Matching refs:tmpbdtr
722 uint32_t tmpbdtr = 0; in LL_TIM_BDTR_Init() local
739 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, TIM_BDTRInitStruct->DeadTime); in LL_TIM_BDTR_Init()
740 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, TIM_BDTRInitStruct->LockLevel); in LL_TIM_BDTR_Init()
741 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, TIM_BDTRInitStruct->OSSIState); in LL_TIM_BDTR_Init()
742 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, TIM_BDTRInitStruct->OSSRState); in LL_TIM_BDTR_Init()
743 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); in LL_TIM_BDTR_Init()
744 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, TIM_BDTRInitStruct->BreakPolarity); in LL_TIM_BDTR_Init()
745 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, TIM_BDTRInitStruct->AutomaticOutput); in LL_TIM_BDTR_Init()
746 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, TIM_BDTRInitStruct->BreakFilter); in LL_TIM_BDTR_Init()
747 MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, TIM_BDTRInitStruct->BreakAFMode); in LL_TIM_BDTR_Init()
757 MODIFY_REG(tmpbdtr, TIM_BDTR_BK2F, (TIM_BDTRInitStruct->Break2Filter)); in LL_TIM_BDTR_Init()
758 MODIFY_REG(tmpbdtr, TIM_BDTR_BK2E, TIM_BDTRInitStruct->Break2State); in LL_TIM_BDTR_Init()
759 MODIFY_REG(tmpbdtr, TIM_BDTR_BK2P, TIM_BDTRInitStruct->Break2Polarity); in LL_TIM_BDTR_Init()
760 MODIFY_REG(tmpbdtr, TIM_BDTR_BK2BID, TIM_BDTRInitStruct->Break2AFMode); in LL_TIM_BDTR_Init()
764 LL_TIM_WriteReg(TIMx, BDTR, tmpbdtr); in LL_TIM_BDTR_Init()