Home
last modified time | relevance | path

Searched refs:USB_DADDR_ADD5_Pos (Results 1 – 25 of 42) sorted by relevance

12

/hal_stm32-latest/stm32cube/stm32f1xx/soc/
Dstm32f102x6.h4888 #define USB_DADDR_ADD5_Pos (5U) macro
4889 #define USB_DADDR_ADD5_Msk (0x1UL << USB_DADDR_ADD5_Pos) /*!< 0x00000020 */
Dstm32f102xb.h4942 #define USB_DADDR_ADD5_Pos (5U) macro
4943 #define USB_DADDR_ADD5_Msk (0x1UL << USB_DADDR_ADD5_Pos) /*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dstm32l152xb.h6893 #define USB_DADDR_ADD5_Pos (5U) macro
6894 #define USB_DADDR_ADD5_Msk (0x1UL << USB_DADDR_ADD5_Pos) /*!< 0x00000020 */
Dstm32l152xba.h6954 #define USB_DADDR_ADD5_Pos (5U) macro
6955 #define USB_DADDR_ADD5_Msk (0x1UL << USB_DADDR_ADD5_Pos) /*!< 0x00000020 */
Dstm32l100xba.h6939 #define USB_DADDR_ADD5_Pos (5U) macro
6940 #define USB_DADDR_ADD5_Msk (0x1UL << USB_DADDR_ADD5_Pos) /*!< 0x00000020 */
Dstm32l100xb.h6791 #define USB_DADDR_ADD5_Pos (5U) macro
6792 #define USB_DADDR_ADD5_Msk (0x1UL << USB_DADDR_ADD5_Pos) /*!< 0x00000020 */
Dstm32l151xb.h6743 #define USB_DADDR_ADD5_Pos (5U) macro
6744 #define USB_DADDR_ADD5_Msk (0x1UL << USB_DADDR_ADD5_Pos) /*!< 0x00000020 */
Dstm32l151xba.h6819 #define USB_DADDR_ADD5_Pos (5U) macro
6820 #define USB_DADDR_ADD5_Msk (0x1UL << USB_DADDR_ADD5_Pos) /*!< 0x00000020 */
Dstm32l100xc.h7524 #define USB_DADDR_ADD5_Pos (5U) macro
7525 #define USB_DADDR_ADD5_Msk (0x1UL << USB_DADDR_ADD5_Pos) /*!< 0x00000020 */
Dstm32l151xc.h7713 #define USB_DADDR_ADD5_Pos (5U) macro
7714 #define USB_DADDR_ADD5_Msk (0x1UL << USB_DADDR_ADD5_Pos) /*!< 0x00000020 */
Dstm32l151xca.h7777 #define USB_DADDR_ADD5_Pos (5U) macro
7778 #define USB_DADDR_ADD5_Msk (0x1UL << USB_DADDR_ADD5_Pos) /*!< 0x00000020 */
Dstm32l151xdx.h7842 #define USB_DADDR_ADD5_Pos (5U) macro
7843 #define USB_DADDR_ADD5_Msk (0x1UL << USB_DADDR_ADD5_Pos) /*!< 0x00000020 */
Dstm32l151xe.h7842 #define USB_DADDR_ADD5_Pos (5U) macro
7843 #define USB_DADDR_ADD5_Msk (0x1UL << USB_DADDR_ADD5_Pos) /*!< 0x00000020 */
Dstm32l152xc.h7842 #define USB_DADDR_ADD5_Pos (5U) macro
7843 #define USB_DADDR_ADD5_Msk (0x1UL << USB_DADDR_ADD5_Pos) /*!< 0x00000020 */
Dstm32l152xca.h7927 #define USB_DADDR_ADD5_Pos (5U) macro
7928 #define USB_DADDR_ADD5_Msk (0x1UL << USB_DADDR_ADD5_Pos) /*!< 0x00000020 */
Dstm32l152xdx.h7992 #define USB_DADDR_ADD5_Pos (5U) macro
7993 #define USB_DADDR_ADD5_Msk (0x1UL << USB_DADDR_ADD5_Pos) /*!< 0x00000020 */
Dstm32l152xe.h7992 #define USB_DADDR_ADD5_Pos (5U) macro
7993 #define USB_DADDR_ADD5_Msk (0x1UL << USB_DADDR_ADD5_Pos) /*!< 0x00000020 */
Dstm32l162xc.h7981 #define USB_DADDR_ADD5_Pos (5U) macro
7982 #define USB_DADDR_ADD5_Msk (0x1UL << USB_DADDR_ADD5_Pos) /*!< 0x00000020 */
Dstm32l162xca.h8066 #define USB_DADDR_ADD5_Pos (5U) macro
8067 #define USB_DADDR_ADD5_Msk (0x1UL << USB_DADDR_ADD5_Pos) /*!< 0x00000020 */
Dstm32l162xdx.h8131 #define USB_DADDR_ADD5_Pos (5U) macro
8132 #define USB_DADDR_ADD5_Msk (0x1UL << USB_DADDR_ADD5_Pos) /*!< 0x00000020 */
Dstm32l162xe.h8131 #define USB_DADDR_ADD5_Pos (5U) macro
8132 #define USB_DADDR_ADD5_Msk (0x1UL << USB_DADDR_ADD5_Pos) /*!< 0x00000020 */
Dstm32l151xd.h8477 #define USB_DADDR_ADD5_Pos (5U) macro
8478 #define USB_DADDR_ADD5_Msk (0x1UL << USB_DADDR_ADD5_Pos) /*!< 0x00000020 */
Dstm32l152xd.h8627 #define USB_DADDR_ADD5_Pos (5U) macro
8628 #define USB_DADDR_ADD5_Msk (0x1UL << USB_DADDR_ADD5_Pos) /*!< 0x00000020 */
Dstm32l162xd.h8766 #define USB_DADDR_ADD5_Pos (5U) macro
8767 #define USB_DADDR_ADD5_Msk (0x1UL << USB_DADDR_ADD5_Pos) /*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c071xx.h7181 #define USB_DADDR_ADD5_Pos (5U) macro
7182 #define USB_DADDR_ADD5_Msk (0x1UL << USB_DADDR_ADD5_Pos) /*!< 0x00000020 */

12