| /hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/ |
| D | stm32n6xx_ll_ucpd.h | 1606 SET_BIT(UCPDx->CFG1, UCPD_CFG1_RXDMAEN); in LL_UCPD_RxDMAEnable()
1617 CLEAR_BIT(UCPDx->CFG1, UCPD_CFG1_RXDMAEN); in LL_UCPD_RxDMADisable()
1661 return ((READ_BIT(UCPDx->CFG1, UCPD_CFG1_RXDMAEN) == (UCPD_CFG1_RXDMAEN)) ? 1UL : 0UL); in LL_UCPD_IsEnabledRxDMA()
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| /hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/ |
| D | stm32h7rsxx_ll_ucpd.h | 1674 SET_BIT(UCPDx->CFG1, UCPD_CFG1_RXDMAEN); in LL_UCPD_RxDMAEnable()
1685 CLEAR_BIT(UCPDx->CFG1, UCPD_CFG1_RXDMAEN); in LL_UCPD_RxDMADisable()
1729 return ((READ_BIT(UCPDx->CFG1, UCPD_CFG1_RXDMAEN) == (UCPD_CFG1_RXDMAEN)) ? 1UL : 0UL); in LL_UCPD_IsEnabledRxDMA()
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| /hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/ |
| D | stm32h5xx_ll_ucpd.h | 1685 SET_BIT(UCPDx->CFG1, UCPD_CFG1_RXDMAEN); in LL_UCPD_RxDMAEnable()
1696 CLEAR_BIT(UCPDx->CFG1, UCPD_CFG1_RXDMAEN); in LL_UCPD_RxDMADisable()
1740 return ((READ_BIT(UCPDx->CFG1, UCPD_CFG1_RXDMAEN) == (UCPD_CFG1_RXDMAEN)) ? 1UL : 0UL); in LL_UCPD_IsEnabledRxDMA()
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| /hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/ |
| D | stm32u5xx_ll_ucpd.h | 1685 SET_BIT(UCPDx->CFG1, UCPD_CFG1_RXDMAEN); in LL_UCPD_RxDMAEnable()
1696 CLEAR_BIT(UCPDx->CFG1, UCPD_CFG1_RXDMAEN); in LL_UCPD_RxDMADisable()
1740 return ((READ_BIT(UCPDx->CFG1, UCPD_CFG1_RXDMAEN) == (UCPD_CFG1_RXDMAEN)) ? 1UL : 0UL); in LL_UCPD_IsEnabledRxDMA()
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| /hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/ |
| D | stm32g0xx_ll_ucpd.h | 1652 SET_BIT(UCPDx->CFG1, UCPD_CFG1_RXDMAEN); in LL_UCPD_RxDMAEnable()
1663 CLEAR_BIT(UCPDx->CFG1, UCPD_CFG1_RXDMAEN); in LL_UCPD_RxDMADisable()
1707 return ((READ_BIT(UCPDx->CFG1, UCPD_CFG1_RXDMAEN) == (UCPD_CFG1_RXDMAEN)) ? 1UL : 0UL); in LL_UCPD_IsEnabledRxDMA()
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| /hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/ |
| D | stm32l5xx_ll_ucpd.h | 1652 SET_BIT(UCPDx->CFG1, UCPD_CFG1_RXDMAEN); in LL_UCPD_RxDMAEnable()
1663 CLEAR_BIT(UCPDx->CFG1, UCPD_CFG1_RXDMAEN); in LL_UCPD_RxDMADisable()
1707 return ((READ_BIT(UCPDx->CFG1, UCPD_CFG1_RXDMAEN) == (UCPD_CFG1_RXDMAEN)) ? 1UL : 0UL); in LL_UCPD_IsEnabledRxDMA()
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| /hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/ |
| D | stm32g4xx_ll_ucpd.h | 1663 SET_BIT(UCPDx->CFG1, UCPD_CFG1_RXDMAEN); in LL_UCPD_RxDMAEnable()
1674 CLEAR_BIT(UCPDx->CFG1, UCPD_CFG1_RXDMAEN); in LL_UCPD_RxDMADisable()
1718 return ((READ_BIT(UCPDx->CFG1, UCPD_CFG1_RXDMAEN) == (UCPD_CFG1_RXDMAEN)) ? 1UL : 0UL); in LL_UCPD_IsEnabledRxDMA()
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| /hal_stm32-latest/stm32cube/stm32g0xx/soc/ |
| D | stm32g071xx.h | 8520 #define UCPD_CFG1_RXDMAEN UCPD_CFG1_RXDMAEN_Msk /*!< DMA receptio… macro
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| D | stm32g081xx.h | 8824 #define UCPD_CFG1_RXDMAEN UCPD_CFG1_RXDMAEN_Msk /*!< DMA receptio… macro
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| D | stm32g0c1xx.h | 10414 #define UCPD_CFG1_RXDMAEN UCPD_CFG1_RXDMAEN_Msk /*!< DMA receptio… macro
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| D | stm32g0b1xx.h | 10110 #define UCPD_CFG1_RXDMAEN UCPD_CFG1_RXDMAEN_Msk /*!< DMA receptio… macro
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| /hal_stm32-latest/stm32cube/stm32g4xx/soc/ |
| D | stm32g441xx.h | 12446 #define UCPD_CFG1_RXDMAEN UCPD_CFG1_RXDMAEN_Msk /*!< DMA reception… macro
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| D | stm32gbk1cb.h | 12163 #define UCPD_CFG1_RXDMAEN UCPD_CFG1_RXDMAEN_Msk /*!< DMA reception… macro
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| D | stm32g431xx.h | 12216 #define UCPD_CFG1_RXDMAEN UCPD_CFG1_RXDMAEN_Msk /*!< DMA reception… macro
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| D | stm32g4a1xx.h | 12956 #define UCPD_CFG1_RXDMAEN UCPD_CFG1_RXDMAEN_Msk /*!< DMA reception… macro
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| D | stm32g491xx.h | 12726 #define UCPD_CFG1_RXDMAEN UCPD_CFG1_RXDMAEN_Msk /*!< DMA reception… macro
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| D | stm32g473xx.h | 13517 #define UCPD_CFG1_RXDMAEN UCPD_CFG1_RXDMAEN_Msk /*!< DMA reception… macro
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| D | stm32g471xx.h | 12949 #define UCPD_CFG1_RXDMAEN UCPD_CFG1_RXDMAEN_Msk /*!< DMA reception… macro
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| D | stm32g483xx.h | 13747 #define UCPD_CFG1_RXDMAEN UCPD_CFG1_RXDMAEN_Msk /*!< DMA reception… macro
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| D | stm32g474xx.h | 17096 #define UCPD_CFG1_RXDMAEN UCPD_CFG1_RXDMAEN_Msk /*!< DMA reception… macro
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| D | stm32g484xx.h | 17326 #define UCPD_CFG1_RXDMAEN UCPD_CFG1_RXDMAEN_Msk /*!< DMA reception… macro
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| /hal_stm32-latest/stm32cube/stm32l5xx/soc/ |
| D | stm32l552xx.h | 17750 #define UCPD_CFG1_RXDMAEN UCPD_CFG1_RXDMAEN_Msk /*!< DMA reception… macro
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| D | stm32l562xx.h | 18521 #define UCPD_CFG1_RXDMAEN UCPD_CFG1_RXDMAEN_Msk /*!< DMA reception… macro
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| /hal_stm32-latest/stm32cube/stm32h5xx/soc/ |
| D | stm32h523xx.h | 16679 #define UCPD_CFG1_RXDMAEN UCPD_CFG1_RXDMAEN_Msk /*!< DMA recept… macro
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| /hal_stm32-latest/stm32cube/stm32h7rsxx/soc/ |
| D | stm32h7r3xx.h | 20439 #define UCPD_CFG1_RXDMAEN UCPD_CFG1_RXDMAEN_Msk /*!< DMA reception… macro
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