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Searched refs:TIM_ECR_IE (Results 1 – 25 of 56) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_tim_ex.c3050 TIM_ECR_IE)); in HAL_TIMEx_ConfigEncoderIndex()
3059 TIM_ECR_IE)); in HAL_TIMEx_ConfigEncoderIndex()
3068 TIM_ECR_IE)); in HAL_TIMEx_ConfigEncoderIndex()
3086 SET_BIT(htim->Instance->ECR, TIM_ECR_IE); in HAL_TIMEx_EnableEncoderIndex()
3100 CLEAR_BIT(htim->Instance->ECR, TIM_ECR_IE); in HAL_TIMEx_DisableEncoderIndex()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_tim.h4690 SET_BIT(TIMx->ECR, TIM_ECR_IE); in LL_TIM_EnableEncoderIndex()
4703 CLEAR_BIT(TIMx->ECR, TIM_ECR_IE); in LL_TIM_DisableEncoderIndex()
4716 return ((READ_BIT(TIMx->ECR, TIM_ECR_IE) == (TIM_ECR_IE)) ? 1U : 0U); in LL_TIM_IsEnabledEncoderIndex()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_tim.h4552 SET_BIT(TIMx->ECR, TIM_ECR_IE); in LL_TIM_EnableEncoderIndex()
4565 CLEAR_BIT(TIMx->ECR, TIM_ECR_IE); in LL_TIM_DisableEncoderIndex()
4578 return ((READ_BIT(TIMx->ECR, TIM_ECR_IE) == (TIM_ECR_IE)) ? 1U : 0U); in LL_TIM_IsEnabledEncoderIndex()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_tim.h4492 SET_BIT(TIMx->ECR, TIM_ECR_IE); in LL_TIM_EnableEncoderIndex()
4505 CLEAR_BIT(TIMx->ECR, TIM_ECR_IE); in LL_TIM_DisableEncoderIndex()
4518 return ((READ_BIT(TIMx->ECR, TIM_ECR_IE) == (TIM_ECR_IE)) ? 1U : 0U); in LL_TIM_IsEnabledEncoderIndex()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_tim_ex.c2928 TIM_ECR_IE)); in HAL_TIMEx_ConfigEncoderIndex()
2945 SET_BIT(htim->Instance->ECR, TIM_ECR_IE); in HAL_TIMEx_EnableEncoderIndex()
2959 CLEAR_BIT(htim->Instance->ECR, TIM_ECR_IE); in HAL_TIMEx_DisableEncoderIndex()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_tim_ex.c2973 TIM_ECR_IE)); in HAL_TIMEx_ConfigEncoderIndex()
2990 SET_BIT(htim->Instance->ECR, TIM_ECR_IE); in HAL_TIMEx_EnableEncoderIndex()
3004 CLEAR_BIT(htim->Instance->ECR, TIM_ECR_IE); in HAL_TIMEx_DisableEncoderIndex()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_tim_ex.c2903 TIM_ECR_IE)); in HAL_TIMEx_ConfigEncoderIndex()
2920 SET_BIT(htim->Instance->ECR, TIM_ECR_IE); in HAL_TIMEx_EnableEncoderIndex()
2934 CLEAR_BIT(htim->Instance->ECR, TIM_ECR_IE); in HAL_TIMEx_DisableEncoderIndex()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_tim_ex.c3051 TIM_ECR_IE)); in HAL_TIMEx_ConfigEncoderIndex()
3068 SET_BIT(htim->Instance->ECR, TIM_ECR_IE); in HAL_TIMEx_EnableEncoderIndex()
3082 CLEAR_BIT(htim->Instance->ECR, TIM_ECR_IE); in HAL_TIMEx_DisableEncoderIndex()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_tim.h4877 SET_BIT(TIMx->ECR, TIM_ECR_IE); in LL_TIM_EnableEncoderIndex()
4890 CLEAR_BIT(TIMx->ECR, TIM_ECR_IE); in LL_TIM_DisableEncoderIndex()
4903 return ((READ_BIT(TIMx->ECR, TIM_ECR_IE) == (TIM_ECR_IE)) ? 1U : 0U); in LL_TIM_IsEnabledEncoderIndex()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_tim.h4828 SET_BIT(TIMx->ECR, TIM_ECR_IE); in LL_TIM_EnableEncoderIndex()
4841 CLEAR_BIT(TIMx->ECR, TIM_ECR_IE); in LL_TIM_DisableEncoderIndex()
4854 return ((READ_BIT(TIMx->ECR, TIM_ECR_IE) == (TIM_ECR_IE)) ? 1U : 0U); in LL_TIM_IsEnabledEncoderIndex()
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_tim.h4994 SET_BIT(TIMx->ECR, TIM_ECR_IE); in LL_TIM_EnableEncoderIndex()
5007 CLEAR_BIT(TIMx->ECR, TIM_ECR_IE); in LL_TIM_DisableEncoderIndex()
5020 return ((READ_BIT(TIMx->ECR, TIM_ECR_IE) == (TIM_ECR_IE)) ? 1U : 0U); in LL_TIM_IsEnabledEncoderIndex()
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_hal_tim_ex.c3243 TIM_ECR_IE)); in HAL_TIMEx_ConfigEncoderIndex()
3260 SET_BIT(htim->Instance->ECR, TIM_ECR_IE); in HAL_TIMEx_EnableEncoderIndex()
3274 CLEAR_BIT(htim->Instance->ECR, TIM_ECR_IE); in HAL_TIMEx_DisableEncoderIndex()
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h9068 #define TIM_ECR_IE TIM_ECR_IE_Msk /*!<Index enabl… macro
Dstm32wba52xx.h13236 #define TIM_ECR_IE TIM_ECR_IE_Msk /*!<Index enabl… macro
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h10248 #define TIM_ECR_IE TIM_ECR_IE_Msk /*!<Index enable */ macro
Dstm32g411xc.h10466 #define TIM_ECR_IE TIM_ECR_IE_Msk /*!<Index enable */ macro
Dstm32g441xx.h11032 #define TIM_ECR_IE TIM_ECR_IE_Msk /*!<Index enable */ macro
Dstm32gbk1cb.h10774 #define TIM_ECR_IE TIM_ECR_IE_Msk /*!<Index enable */ macro
Dstm32g431xx.h10802 #define TIM_ECR_IE TIM_ECR_IE_Msk /*!<Index enable */ macro
Dstm32g4a1xx.h11542 #define TIM_ECR_IE TIM_ECR_IE_Msk /*!<Index enable */ macro
Dstm32g491xx.h11312 #define TIM_ECR_IE TIM_ECR_IE_Msk /*!<Index enable */ macro
Dstm32g473xx.h12103 #define TIM_ECR_IE TIM_ECR_IE_Msk /*!<Index enable */ macro
Dstm32g471xx.h11535 #define TIM_ECR_IE TIM_ECR_IE_Msk /*!<Index enable */ macro
Dstm32g483xx.h12333 #define TIM_ECR_IE TIM_ECR_IE_Msk /*!<Index enable */ macro
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h7510 #define TIM_ECR_IE TIM_ECR_IE_Msk /*!<Index enabl… macro

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