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Searched refs:TIM_DTR2_DTPE (Results 1 – 25 of 56) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_tim.h4558 SET_BIT(TIMx->DTR2, TIM_DTR2_DTPE); in LL_TIM_EnableDeadTimePreload()
4571 CLEAR_BIT(TIMx->DTR2, TIM_DTR2_DTPE); in LL_TIM_DisableDeadTimePreload()
4584 return ((READ_BIT(TIMx->DTR2, TIM_DTR2_DTPE) == (TIM_DTR2_DTPE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDeadTimePreload()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_tim.h4420 SET_BIT(TIMx->DTR2, TIM_DTR2_DTPE); in LL_TIM_EnableDeadTimePreload()
4433 CLEAR_BIT(TIMx->DTR2, TIM_DTR2_DTPE); in LL_TIM_DisableDeadTimePreload()
4446 return ((READ_BIT(TIMx->DTR2, TIM_DTR2_DTPE) == (TIM_DTR2_DTPE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDeadTimePreload()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_tim.h4359 SET_BIT(TIMx->DTR2, TIM_DTR2_DTPE); in LL_TIM_EnableDeadTimePreload()
4372 CLEAR_BIT(TIMx->DTR2, TIM_DTR2_DTPE); in LL_TIM_DisableDeadTimePreload()
4385 return ((READ_BIT(TIMx->DTR2, TIM_DTR2_DTPE) == (TIM_DTR2_DTPE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDeadTimePreload()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_tim.h4744 SET_BIT(TIMx->DTR2, TIM_DTR2_DTPE); in LL_TIM_EnableDeadTimePreload()
4757 CLEAR_BIT(TIMx->DTR2, TIM_DTR2_DTPE); in LL_TIM_DisableDeadTimePreload()
4770 return ((READ_BIT(TIMx->DTR2, TIM_DTR2_DTPE) == (TIM_DTR2_DTPE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDeadTimePreload()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_tim.h4695 SET_BIT(TIMx->DTR2, TIM_DTR2_DTPE); in LL_TIM_EnableDeadTimePreload()
4708 CLEAR_BIT(TIMx->DTR2, TIM_DTR2_DTPE); in LL_TIM_DisableDeadTimePreload()
4721 return ((READ_BIT(TIMx->DTR2, TIM_DTR2_DTPE) == (TIM_DTR2_DTPE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDeadTimePreload()
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_tim.h4871 SET_BIT(TIMx->DTR2, TIM_DTR2_DTPE); in LL_TIM_EnableDeadTimePreload()
4884 CLEAR_BIT(TIMx->DTR2, TIM_DTR2_DTPE); in LL_TIM_DisableDeadTimePreload()
4897 return ((READ_BIT(TIMx->DTR2, TIM_DTR2_DTPE) == (TIM_DTR2_DTPE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDeadTimePreload()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_tim_ex.c2810 SET_BIT(htim->Instance->DTR2, TIM_DTR2_DTPE); in HAL_TIMEx_EnableDeadTimePreload()
2824 CLEAR_BIT(htim->Instance->DTR2, TIM_DTR2_DTPE); in HAL_TIMEx_DisableDeadTimePreload()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_tim_ex.c2929 SET_BIT(htim->Instance->DTR2, TIM_DTR2_DTPE); in HAL_TIMEx_EnableDeadTimePreload()
2943 CLEAR_BIT(htim->Instance->DTR2, TIM_DTR2_DTPE); in HAL_TIMEx_DisableDeadTimePreload()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_tim_ex.c2855 SET_BIT(htim->Instance->DTR2, TIM_DTR2_DTPE); in HAL_TIMEx_EnableDeadTimePreload()
2869 CLEAR_BIT(htim->Instance->DTR2, TIM_DTR2_DTPE); in HAL_TIMEx_DisableDeadTimePreload()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_tim_ex.c2785 SET_BIT(htim->Instance->DTR2, TIM_DTR2_DTPE); in HAL_TIMEx_EnableDeadTimePreload()
2799 CLEAR_BIT(htim->Instance->DTR2, TIM_DTR2_DTPE); in HAL_TIMEx_DisableDeadTimePreload()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_tim_ex.c2933 SET_BIT(htim->Instance->DTR2, TIM_DTR2_DTPE); in HAL_TIMEx_EnableDeadTimePreload()
2947 CLEAR_BIT(htim->Instance->DTR2, TIM_DTR2_DTPE); in HAL_TIMEx_DisableDeadTimePreload()
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_hal_tim_ex.c3127 SET_BIT(htim->Instance->DTR2, TIM_DTR2_DTPE); in HAL_TIMEx_EnableDeadTimePreload()
3141 CLEAR_BIT(htim->Instance->DTR2, TIM_DTR2_DTPE); in HAL_TIMEx_DisableDeadTimePreload()
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h9063 #define TIM_DTR2_DTPE TIM_DTR2_DTPE_Msk /*!<Deadtime pr… macro
Dstm32wba52xx.h13231 #define TIM_DTR2_DTPE TIM_DTR2_DTPE_Msk /*!<Deadtime pr… macro
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h10243 #define TIM_DTR2_DTPE TIM_DTR2_DTPE_Msk /*!<Deadtime prelaod en… macro
Dstm32g411xc.h10461 #define TIM_DTR2_DTPE TIM_DTR2_DTPE_Msk /*!<Deadtime prelaod en… macro
Dstm32g441xx.h11027 #define TIM_DTR2_DTPE TIM_DTR2_DTPE_Msk /*!<Deadtime prelaod en… macro
Dstm32gbk1cb.h10769 #define TIM_DTR2_DTPE TIM_DTR2_DTPE_Msk /*!<Deadtime prelaod en… macro
Dstm32g431xx.h10797 #define TIM_DTR2_DTPE TIM_DTR2_DTPE_Msk /*!<Deadtime prelaod en… macro
Dstm32g4a1xx.h11537 #define TIM_DTR2_DTPE TIM_DTR2_DTPE_Msk /*!<Deadtime prelaod en… macro
Dstm32g491xx.h11307 #define TIM_DTR2_DTPE TIM_DTR2_DTPE_Msk /*!<Deadtime prelaod en… macro
Dstm32g473xx.h12098 #define TIM_DTR2_DTPE TIM_DTR2_DTPE_Msk /*!<Deadtime prelaod en… macro
Dstm32g471xx.h11530 #define TIM_DTR2_DTPE TIM_DTR2_DTPE_Msk /*!<Deadtime prelaod en… macro
Dstm32g483xx.h12328 #define TIM_DTR2_DTPE TIM_DTR2_DTPE_Msk /*!<Deadtime prelaod en… macro
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h7505 #define TIM_DTR2_DTPE TIM_DTR2_DTPE_Msk /*!<Deadtime pr… macro

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