Home
last modified time | relevance | path

Searched refs:TIM_BDTR_OSSI_Pos (Results 1 – 25 of 237) sorted by relevance

12345678910

/hal_stm32-latest/stm32cube/stm32f1xx/soc/
Dstm32f101x6.h4076 #define TIM_BDTR_OSSI_Pos (10U) macro
4077 #define TIM_BDTR_OSSI_Msk (0x1UL << TIM_BDTR_OSSI_Pos) /*!< 0x00000400 */
Dstm32f101xb.h4138 #define TIM_BDTR_OSSI_Pos (10U) macro
4139 #define TIM_BDTR_OSSI_Msk (0x1UL << TIM_BDTR_OSSI_Pos) /*!< 0x00000400 */
Dstm32f100xb.h4543 #define TIM_BDTR_OSSI_Pos (10U) macro
4544 #define TIM_BDTR_OSSI_Msk (0x1UL << TIM_BDTR_OSSI_Pos) /*!< 0x00000400 */
Dstm32f102x6.h4125 #define TIM_BDTR_OSSI_Pos (10U) macro
4126 #define TIM_BDTR_OSSI_Msk (0x1UL << TIM_BDTR_OSSI_Pos) /*!< 0x00000400 */
Dstm32f100xe.h4890 #define TIM_BDTR_OSSI_Pos (10U) macro
4891 #define TIM_BDTR_OSSI_Msk (0x1UL << TIM_BDTR_OSSI_Pos) /*!< 0x00000400 */
Dstm32f101xg.h4757 #define TIM_BDTR_OSSI_Pos (10U) macro
4758 #define TIM_BDTR_OSSI_Msk (0x1UL << TIM_BDTR_OSSI_Pos) /*!< 0x00000400 */
Dstm32f101xe.h4682 #define TIM_BDTR_OSSI_Pos (10U) macro
4683 #define TIM_BDTR_OSSI_Msk (0x1UL << TIM_BDTR_OSSI_Pos) /*!< 0x00000400 */
Dstm32f102xb.h4179 #define TIM_BDTR_OSSI_Pos (10U) macro
4180 #define TIM_BDTR_OSSI_Msk (0x1UL << TIM_BDTR_OSSI_Pos) /*!< 0x00000400 */
/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f030x6.h4668 #define TIM_BDTR_OSSI_Pos (10U) macro
4669 #define TIM_BDTR_OSSI_Msk (0x1UL << TIM_BDTR_OSSI_Pos) /*!< 0x00000400 */
Dstm32f030x8.h4703 #define TIM_BDTR_OSSI_Pos (10U) macro
4704 #define TIM_BDTR_OSSI_Msk (0x1UL << TIM_BDTR_OSSI_Pos) /*!< 0x00000400 */
Dstm32f070x6.h4751 #define TIM_BDTR_OSSI_Pos (10U) macro
4752 #define TIM_BDTR_OSSI_Msk (0x1UL << TIM_BDTR_OSSI_Pos) /*!< 0x00000400 */
Dstm32f031x6.h4870 #define TIM_BDTR_OSSI_Pos (10U) macro
4871 #define TIM_BDTR_OSSI_Msk (0x1UL << TIM_BDTR_OSSI_Pos) /*!< 0x00000400 */
Dstm32f030xc.h5036 #define TIM_BDTR_OSSI_Pos (10U) macro
5037 #define TIM_BDTR_OSSI_Msk (0x1UL << TIM_BDTR_OSSI_Pos) /*!< 0x00000400 */
Dstm32f038xx.h4839 #define TIM_BDTR_OSSI_Pos (10U) macro
4840 #define TIM_BDTR_OSSI_Msk (0x1UL << TIM_BDTR_OSSI_Pos) /*!< 0x00000400 */
Dstm32f070xb.h4903 #define TIM_BDTR_OSSI_Pos (10U) macro
4904 #define TIM_BDTR_OSSI_Msk (0x1UL << TIM_BDTR_OSSI_Pos) /*!< 0x00000400 */
Dstm32f058xx.h5330 #define TIM_BDTR_OSSI_Pos (10U) macro
5331 #define TIM_BDTR_OSSI_Msk (0x1UL << TIM_BDTR_OSSI_Pos) /*!< 0x00000400 */
Dstm32f051x8.h5361 #define TIM_BDTR_OSSI_Pos (10U) macro
5362 #define TIM_BDTR_OSSI_Msk (0x1UL << TIM_BDTR_OSSI_Pos) /*!< 0x00000400 */
Dstm32f071xb.h5914 #define TIM_BDTR_OSSI_Pos (10U) macro
5915 #define TIM_BDTR_OSSI_Msk (0x1UL << TIM_BDTR_OSSI_Pos) /*!< 0x00000400 */
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h5736 #define TIM_BDTR_OSSI_Pos (10U) macro
5737 #define TIM_BDTR_OSSI_Msk (0x1UL << TIM_BDTR_OSSI_Pos) /*!< 0x00000400 */
Dstm32c031xx.h5899 #define TIM_BDTR_OSSI_Pos (10U) macro
5900 #define TIM_BDTR_OSSI_Msk (0x1UL << TIM_BDTR_OSSI_Pos) /*!< 0x00000400 */
Dstm32c071xx.h6403 #define TIM_BDTR_OSSI_Pos (10U) macro
6404 #define TIM_BDTR_OSSI_Msk (0x1UL << TIM_BDTR_OSSI_Pos) /*!< 0x00000400 */
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f410cx.h6482 #define TIM_BDTR_OSSI_Pos (10U) macro
6483 #define TIM_BDTR_OSSI_Msk (0x1UL << TIM_BDTR_OSSI_Pos) /*!< 0x00000400 */
Dstm32f410rx.h6486 #define TIM_BDTR_OSSI_Pos (10U) macro
6487 #define TIM_BDTR_OSSI_Msk (0x1UL << TIM_BDTR_OSSI_Pos) /*!< 0x00000400 */
Dstm32f410tx.h6442 #define TIM_BDTR_OSSI_Pos (10U) macro
6443 #define TIM_BDTR_OSSI_Msk (0x1UL << TIM_BDTR_OSSI_Pos) /*!< 0x00000400 */
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h6348 #define TIM_BDTR_OSSI_Pos (10U) macro
6349 #define TIM_BDTR_OSSI_Msk (0x1UL << TIM_BDTR_OSSI_Pos) /*!< 0x00000400 */

12345678910