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Searched refs:TCMR (Results 1 – 15 of 15) sorted by relevance

/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_opamp.h639 MODIFY_REG(OPAMPx->TCMR, OPAMP_TCMR_VPSSEL, InputNonInverting); in LL_OPAMP_SetInputNonInvertingSecondary()
655 return (uint32_t)(READ_BIT(OPAMPx->TCMR, OPAMP_TCMR_VPSSEL)); in LL_OPAMP_GetInputNonInvertingSecondary()
675 MODIFY_REG(OPAMPx->TCMR, OPAMP_TCMR_VMSSEL, InputInverting); in LL_OPAMP_SetInputInvertingSecondary()
690 return (uint32_t)(READ_BIT(OPAMPx->TCMR, OPAMP_TCMR_VMSSEL)); in LL_OPAMP_GetInputInvertingSecondary()
707 …MODIFY_REG(OPAMPx->TCMR, OPAMP_TCMR_T1CMEN | OPAMP_TCMR_T8CMEN | OPAMP_TCMR_T20CMEN, InputsMuxMode… in LL_OPAMP_SetInputsMuxMode()
723 …return (uint32_t)(READ_BIT(OPAMPx->TCMR, OPAMP_TCMR_T1CMEN | OPAMP_TCMR_T8CMEN | OPAMP_TCMR_T20CME… in LL_OPAMP_GetInputsMuxMode()
973 SET_BIT(OPAMPx->TCMR, OPAMP_TCMR_LOCK); in LL_OPAMP_LockTimerMux()
987 return ((READ_BIT(OPAMPx->TCMR, OPAMP_TCMR_LOCK) == (OPAMP_TCMR_LOCK)) ? 1UL : 0UL); in LL_OPAMP_IsTimerMuxLocked()
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_hal_opamp.c431 if ((READ_BIT(hopamp->Instance->TCMR, OPAMP_TCMR_LOCK)) == 0UL) in HAL_OPAMP_Init()
433 MODIFY_REG(hopamp->Instance->TCMR, in HAL_OPAMP_Init()
929 else if (READ_BIT(hopamp->Instance->TCMR, OPAMP_TCMR_LOCK) == OPAMP_TCMR_LOCK) in HAL_OPAMP_LockTimerMux()
939 SET_BIT(hopamp->Instance->TCMR, OPAMP_TCMR_LOCK); in HAL_OPAMP_LockTimerMux()
Dstm32g4xx_ll_opamp.c129 LL_OPAMP_WriteReg(OPAMPx, TCMR, 0x00000000UL); in LL_OPAMP_DeInit()
131 else if (LL_OPAMP_ReadReg(OPAMPx, TCMR) != 0x80000000UL) in LL_OPAMP_DeInit()
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h526 …__IO uint32_t TCMR; /*!< OPAMP timer controlled mux mode register, Address offse… member
Dstm32g411xc.h541 …__IO uint32_t TCMR; /*!< OPAMP timer controlled mux mode register, Address offse… member
Dstm32g441xx.h536 …__IO uint32_t TCMR; /*!< OPAMP timer controlled mux mode register, Address offse… member
Dstm32gbk1cb.h534 …__IO uint32_t TCMR; /*!< OPAMP timer controlled mux mode register, Address offse… member
Dstm32g431xx.h535 …__IO uint32_t TCMR; /*!< OPAMP timer controlled mux mode register, Address offse… member
Dstm32g4a1xx.h549 …__IO uint32_t TCMR; /*!< OPAMP timer controlled mux mode register, Address offse… member
Dstm32g491xx.h548 …__IO uint32_t TCMR; /*!< OPAMP timer controlled mux mode register, Address offse… member
Dstm32g473xx.h596 …__IO uint32_t TCMR; /*!< OPAMP timer controlled mux mode register, Address offse… member
Dstm32g471xx.h557 …__IO uint32_t TCMR; /*!< OPAMP timer controlled mux mode register, Address offse… member
Dstm32g483xx.h597 …__IO uint32_t TCMR; /*!< OPAMP timer controlled mux mode register, Address offse… member
Dstm32g474xx.h604 …__IO uint32_t TCMR; /*!< OPAMP timer controlled mux mode register, Address offse… member
Dstm32g484xx.h605 …__IO uint32_t TCMR; /*!< OPAMP timer controlled mux mode register, Address offse… member