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Searched refs:SYSCFG_ITLINE11_SR_DMA1_CH5_Pos (Results 1 – 18 of 18) sorted by relevance

/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c071xx.h5735 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Pos (2U) macro
5736 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Msk (0x1UL << SYSCFG_ITLINE11_SR_DMA1_CH5_Pos) /*!< 0x…
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h5683 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Pos (2U) macro
5684 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Msk (0x1UL << SYSCFG_ITLINE11_SR_DMA1_CH5_Pos) /*!< 0x000…
Dstm32g050xx.h5729 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Pos (2U) macro
5730 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Msk (0x1UL << SYSCFG_ITLINE11_SR_DMA1_CH5_Pos) /*!< 0x000…
Dstm32g070xx.h5862 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Pos (2U) macro
5863 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Msk (0x1UL << SYSCFG_ITLINE11_SR_DMA1_CH5_Pos) /*!< 0x000…
Dstm32g031xx.h5935 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Pos (2U) macro
5936 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Msk (0x1UL << SYSCFG_ITLINE11_SR_DMA1_CH5_Pos) /*!< 0x000…
Dstm32g041xx.h6233 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Pos (2U) macro
6234 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Msk (0x1UL << SYSCFG_ITLINE11_SR_DMA1_CH5_Pos) /*!< 0x000…
Dstm32g051xx.h6310 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Pos (2U) macro
6311 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Msk (0x1UL << SYSCFG_ITLINE11_SR_DMA1_CH5_Pos) /*!< 0x000…
Dstm32g061xx.h6608 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Pos (2U) macro
6609 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Msk (0x1UL << SYSCFG_ITLINE11_SR_DMA1_CH5_Pos) /*!< 0x000…
Dstm32g071xx.h6685 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Pos (2U) macro
6686 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Msk (0x1UL << SYSCFG_ITLINE11_SR_DMA1_CH5_Pos) /*!< 0x000…
Dstm32g081xx.h6983 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Pos (2U) macro
6984 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Msk (0x1UL << SYSCFG_ITLINE11_SR_DMA1_CH5_Pos) /*!< 0x000…
Dstm32g0b0xx.h7012 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Pos (2U) macro
7013 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Msk (0x1UL << SYSCFG_ITLINE11_SR_DMA1_CH5_Pos) /*!< 0x000…
Dstm32g0c1xx.h8467 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Pos (2U) macro
8468 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Msk (0x1UL << SYSCFG_ITLINE11_SR_DMA1_CH5_Pos) /*!< 0x000…
Dstm32g0b1xx.h8169 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Pos (2U) macro
8170 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Msk (0x1UL << SYSCFG_ITLINE11_SR_DMA1_CH5_Pos) /*!< 0x000…
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h7043 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Pos (2U) macro
7044 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Msk (0x1UL << SYSCFG_ITLINE11_SR_DMA1_CH5_Pos) /*!< 0x00000…
Dstm32u083xx.h7947 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Pos (2U) macro
7948 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Msk (0x1UL << SYSCFG_ITLINE11_SR_DMA1_CH5_Pos) /*!< 0x00000…
Dstm32u073xx.h7680 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Pos (2U) macro
7681 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Msk (0x1UL << SYSCFG_ITLINE11_SR_DMA1_CH5_Pos) /*!< 0x00000…
/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f091xc.h9756 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Pos (1U) macro
9757 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Msk (0x1UL << SYSCFG_ITLINE11_SR_DMA1_CH5_Pos) /*!< 0x0000…
Dstm32f098xx.h9723 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Pos (1U) macro
9724 #define SYSCFG_ITLINE11_SR_DMA1_CH5_Msk (0x1UL << SYSCFG_ITLINE11_SR_DMA1_CH5_Pos) /*!< 0x0000…