/hal_stm32-latest/stm32cube/stm32u0xx/soc/ |
D | stm32u031xx.h | 9448 #define SWPMI_ICR_CTXUNRF_Pos (4U) macro 9449 #define SWPMI_ICR_CTXUNRF_Msk (0x1UL << SWPMI_ICR_CTXUNRF_Pos) /*!< 0x00000010 */
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D | stm32u083xx.h | 10408 #define SWPMI_ICR_CTXUNRF_Pos (4U) macro 10409 #define SWPMI_ICR_CTXUNRF_Msk (0x1UL << SWPMI_ICR_CTXUNRF_Pos) /*!< 0x00000010 */
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D | stm32u073xx.h | 10138 #define SWPMI_ICR_CTXUNRF_Pos (4U) macro 10139 #define SWPMI_ICR_CTXUNRF_Msk (0x1UL << SWPMI_ICR_CTXUNRF_Pos) /*!< 0x00000010 */
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/hal_stm32-latest/stm32cube/stm32l4xx/soc/ |
D | stm32l433xx.h | 14660 #define SWPMI_ICR_CTXUNRF_Pos (4U) macro 14661 #define SWPMI_ICR_CTXUNRF_Msk (0x1UL << SWPMI_ICR_CTXUNRF_Pos) /*!< 0x00000010 */
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D | stm32l442xx.h | 13826 #define SWPMI_ICR_CTXUNRF_Pos (4U) macro 13827 #define SWPMI_ICR_CTXUNRF_Msk (0x1UL << SWPMI_ICR_CTXUNRF_Pos) /*!< 0x00000010 */
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D | stm32l431xx.h | 14431 #define SWPMI_ICR_CTXUNRF_Pos (4U) macro 14432 #define SWPMI_ICR_CTXUNRF_Msk (0x1UL << SWPMI_ICR_CTXUNRF_Pos) /*!< 0x00000010 */
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D | stm32l432xx.h | 13601 #define SWPMI_ICR_CTXUNRF_Pos (4U) macro 13602 #define SWPMI_ICR_CTXUNRF_Msk (0x1UL << SWPMI_ICR_CTXUNRF_Pos) /*!< 0x00000010 */
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D | stm32l443xx.h | 14885 #define SWPMI_ICR_CTXUNRF_Pos (4U) macro 14886 #define SWPMI_ICR_CTXUNRF_Msk (0x1UL << SWPMI_ICR_CTXUNRF_Pos) /*!< 0x00000010 */
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D | stm32l471xx.h | 15996 #define SWPMI_ICR_CTXUNRF_Pos (4U) macro 15997 #define SWPMI_ICR_CTXUNRF_Msk (0x1UL << SWPMI_ICR_CTXUNRF_Pos) /*!< 0x00000010 */
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D | stm32l475xx.h | 16160 #define SWPMI_ICR_CTXUNRF_Pos (4U) macro 16161 #define SWPMI_ICR_CTXUNRF_Msk (0x1UL << SWPMI_ICR_CTXUNRF_Pos) /*!< 0x00000010 */
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D | stm32l476xx.h | 16317 #define SWPMI_ICR_CTXUNRF_Pos (4U) macro 16318 #define SWPMI_ICR_CTXUNRF_Msk (0x1UL << SWPMI_ICR_CTXUNRF_Pos) /*!< 0x00000010 */
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D | stm32l486xx.h | 16536 #define SWPMI_ICR_CTXUNRF_Pos (4U) macro 16537 #define SWPMI_ICR_CTXUNRF_Msk (0x1UL << SWPMI_ICR_CTXUNRF_Pos) /*!< 0x00000010 */
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D | stm32l485xx.h | 16385 #define SWPMI_ICR_CTXUNRF_Pos (4U) macro 16386 #define SWPMI_ICR_CTXUNRF_Msk (0x1UL << SWPMI_ICR_CTXUNRF_Pos) /*!< 0x00000010 */
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D | stm32l4a6xx.h | 17883 #define SWPMI_ICR_CTXUNRF_Pos (4U) macro 17884 #define SWPMI_ICR_CTXUNRF_Msk (0x1UL << SWPMI_ICR_CTXUNRF_Pos) /*!< 0x00000010 */
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D | stm32l496xx.h | 17543 #define SWPMI_ICR_CTXUNRF_Pos (4U) macro 17544 #define SWPMI_ICR_CTXUNRF_Msk (0x1UL << SWPMI_ICR_CTXUNRF_Pos) /*!< 0x00000010 */
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/hal_stm32-latest/stm32cube/stm32h7xx/soc/ |
D | stm32h7a3xx.h | 19847 #define SWPMI_ICR_CTXUNRF_Pos (4U) macro 19848 #define SWPMI_ICR_CTXUNRF_Msk (0x1UL << SWPMI_ICR_CTXUNRF_Pos) /*!< 0x00000010 */
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D | stm32h7b0xx.h | 20327 #define SWPMI_ICR_CTXUNRF_Pos (4U) macro 20328 #define SWPMI_ICR_CTXUNRF_Msk (0x1UL << SWPMI_ICR_CTXUNRF_Pos) /*!< 0x00000010 */
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D | stm32h7b0xxq.h | 20339 #define SWPMI_ICR_CTXUNRF_Pos (4U) macro 20340 #define SWPMI_ICR_CTXUNRF_Msk (0x1UL << SWPMI_ICR_CTXUNRF_Pos) /*!< 0x00000010 */
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D | stm32h7a3xxq.h | 19859 #define SWPMI_ICR_CTXUNRF_Pos (4U) macro 19860 #define SWPMI_ICR_CTXUNRF_Msk (0x1UL << SWPMI_ICR_CTXUNRF_Pos) /*!< 0x00000010 */
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D | stm32h7b3xx.h | 20334 #define SWPMI_ICR_CTXUNRF_Pos (4U) macro 20335 #define SWPMI_ICR_CTXUNRF_Msk (0x1UL << SWPMI_ICR_CTXUNRF_Pos) /*!< 0x00000010 */
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D | stm32h7b3xxq.h | 20346 #define SWPMI_ICR_CTXUNRF_Pos (4U) macro 20347 #define SWPMI_ICR_CTXUNRF_Msk (0x1UL << SWPMI_ICR_CTXUNRF_Pos) /*!< 0x00000010 */
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D | stm32h730xxq.h | 22023 #define SWPMI_ICR_CTXUNRF_Pos (4U) macro 22024 #define SWPMI_ICR_CTXUNRF_Msk (0x1UL << SWPMI_ICR_CTXUNRF_Pos) /*!< 0x00000010 */
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D | stm32h733xx.h | 22011 #define SWPMI_ICR_CTXUNRF_Pos (4U) macro 22012 #define SWPMI_ICR_CTXUNRF_Msk (0x1UL << SWPMI_ICR_CTXUNRF_Pos) /*!< 0x00000010 */
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D | stm32h725xx.h | 21536 #define SWPMI_ICR_CTXUNRF_Pos (4U) macro 21537 #define SWPMI_ICR_CTXUNRF_Msk (0x1UL << SWPMI_ICR_CTXUNRF_Pos) /*!< 0x00000010 */
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D | stm32h730xx.h | 22011 #define SWPMI_ICR_CTXUNRF_Pos (4U) macro 22012 #define SWPMI_ICR_CTXUNRF_Msk (0x1UL << SWPMI_ICR_CTXUNRF_Pos) /*!< 0x00000010 */
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