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Searched refs:SRAM_BASE (Results 1 – 25 of 214) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_hal_firewall.h131 …LATILEDATA_SEGMENT_ADDRESS(ADDRESS) (((ADDRESS) >= SRAM_BASE) && ((ADDRESS) < (SRAM_BASE + …
132 …OLATILEDATA_SEGMENT_LENGTH(ADDRESS, LENGTH) (((ADDRESS) + (LENGTH)) <= (SRAM_BASE + SRAM_SIZE_MAX))
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dsystem_stm32g4xx.c117 #define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dsystem_stm32c0xx.c147 SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ in SystemInit()
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dsystem_stm32f3xx.c108 #define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dsystem_stm32g0xx.c124 #define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dsystem_stm32l0xx.c91 #define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dsystem_stm32f2xx.c88 #define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
/hal_stm32-latest/stm32cube/stm32f1xx/soc/
Dsystem_stm32f1xx.c103 #define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
Dstm32f101x6.h464 #define SRAM_BASE 0x20000000UL /*!< SRAM base address in the alias region */ macro
/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dsystem_stm32l1xx.c89 #define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
/hal_stm32-latest/stm32cube/stm32wb0x/soc/
Dsystem_stm32wb0x.c98 #define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
Dstm32wb07.h890 #define SRAM_BASE (0x20000000U) /*!< SRAM base address */ macro
900 #define SRAM0_BASE SRAM_BASE /*!< SRAM0 (16 KB) base address */
901 #define SRAM1_BASE (SRAM_BASE + 0x00004000U) /*!< SRAM1 (16 KB) base address */
902 #define SRAM2_BASE (SRAM_BASE + 0x00008000U) /*!< SRAM2 (16 KB) base address */
903 #define SRAM3_BASE (SRAM_BASE + 0x0000C000U) /*!< SRAM3 (16 KB) base address */
Dstm32wb09.h841 #define SRAM_BASE (0x20000000U) /*!< SRAM base address */ macro
851 #define SRAM0_BASE SRAM_BASE /*!< SRAM0 (16 KB) base address …
852 #define SRAM1_BASE (SRAM_BASE + 0x00004000U) /*!< SRAM1 (16 KB) base address …
853 #define SRAM2_BASE (SRAM_BASE + 0x00008000U) /*!< SRAM2 (16 KB) base address …
854 #define SRAM3_BASE (SRAM_BASE + 0x0000C000U) /*!< SRAM3 (16 KB) base address …
Dstm32wb06.h890 #define SRAM_BASE (0x20000000U) /*!< SRAM base address */ macro
900 #define SRAM0_BASE SRAM_BASE /*!< SRAM0 (16 KB) base address */
901 #define SRAM1_BASE (SRAM_BASE + 0x00004000U) /*!< SRAM1 (16 KB) base address */
902 #define SRAM2_BASE (SRAM_BASE + 0x00008000U) /*!< SRAM2 (16 KB) base address */
903 #define SRAM3_BASE (SRAM_BASE + 0x0000C000U) /*!< SRAM3 (16 KB) base address */
Dstm32wb05.h845 #define SRAM_BASE (0x20000000U) /*!< SRAM base address */ macro
855 #define SRAM0_BASE SRAM_BASE /*!< SRAM0 (12 KB) base address …
856 #define SRAM1_BASE (SRAM_BASE + 0x00003000U) /*!< SRAM1 (12 KB) base address …
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dsystem_stm32f4xx.c101 #define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb50xx.h750 #define SRAM_BASE (0x20000000UL)/*!< SRAM(up to 256 KB) base address */ macro
761 #define SRAM1_BASE SRAM_BASE /*!< SRAM1(up to 64 KB) base address */
762 #define SRAM2A_BASE (SRAM_BASE + 0x00030000UL)/*!< SRAM2A(32 KB) base address */
763 #define SRAM2B_BASE (SRAM_BASE + 0x00038000UL)/*!< SRAM2B(32 KB) base address */
Dstm32wb1mxx.h766 #define SRAM_BASE (0x20000000UL)/*!< SRAM(up to 12 KB) base address */ macro
777 #define SRAM1_BASE SRAM_BASE /*!< SRAM1(up to 12 KB) base address */
778 #define SRAM2A_BASE (SRAM_BASE + 0x00030000UL)/*!< SRAM2A(32 KB) base address */
779 #define SRAM2B_BASE (SRAM_BASE + 0x00038000UL)/*!< SRAM2B(4 KB) base address */
Dstm32wb30xx.h749 #define SRAM_BASE (0x20000000UL)/*!< SRAM(up to 256 KB) base address */ macro
760 #define SRAM1_BASE SRAM_BASE /*!< SRAM1(up to 32 KB) base address */
761 #define SRAM2A_BASE (SRAM_BASE + 0x00030000UL)/*!< SRAM2A(32 KB) base address */
762 #define SRAM2B_BASE (SRAM_BASE + 0x00038000UL)/*!< SRAM2B(32 KB) base address */
Dstm32wb35xx.h881 #define SRAM_BASE (0x20000000UL)/*!< SRAM(up to 96 KB) base address */ macro
892 #define SRAM1_BASE SRAM_BASE /*!< SRAM1(up to 32 KB) base address */
893 #define SRAM2A_BASE (SRAM_BASE + 0x00030000UL)/*!< SRAM2A(32 KB) base address */
894 #define SRAM2B_BASE (SRAM_BASE + 0x00038000UL)/*!< SRAM2B(32 KB) base address */
Dstm32wb55xx.h919 #define SRAM_BASE (0x20000000UL)/*!< SRAM(up to 256 KB) base address */ macro
930 #define SRAM1_BASE SRAM_BASE /*!< SRAM1(up to 192 KB) base address */
931 #define SRAM2A_BASE (SRAM_BASE + 0x00030000UL)/*!< SRAM2A(32 KB) base address */
932 #define SRAM2B_BASE (SRAM_BASE + 0x00038000UL)/*!< SRAM2B(32 KB) base address */
Dstm32wb5mxx.h919 #define SRAM_BASE (0x20000000UL)/*!< SRAM(up to 256 KB) base address */ macro
930 #define SRAM1_BASE SRAM_BASE /*!< SRAM1(up to 192 KB) base address */
931 #define SRAM2A_BASE (SRAM_BASE + 0x00030000UL)/*!< SRAM2A(32 KB) base address */
932 #define SRAM2B_BASE (SRAM_BASE + 0x00038000UL)/*!< SRAM2B(32 KB) base address */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h756 #define SRAM_BASE (0x20000000UL)/*!< SRAM(up to 12 KB) base address */ macro
767 #define SRAM1_BASE SRAM_BASE /*!< SRAM1(up to 12 KB) base address */
768 #define SRAM2A_BASE (SRAM_BASE + 0x00030000UL)/*!< SRAM2A(32 KB) base address */
769 #define SRAM2B_BASE (SRAM_BASE + 0x00038000UL)/*!< SRAM2B(4 KB) base address */
Dstm32wb15xx.h766 #define SRAM_BASE (0x20000000UL)/*!< SRAM(up to 12 KB) base address */ macro
777 #define SRAM1_BASE SRAM_BASE /*!< SRAM1(up to 12 KB) base address */
778 #define SRAM2A_BASE (SRAM_BASE + 0x00030000UL)/*!< SRAM2A(32 KB) base address */
779 #define SRAM2B_BASE (SRAM_BASE + 0x00038000UL)/*!< SRAM2B(4 KB) base address */
/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f030x6.h428 #define SRAM_BASE 0x20000000UL /*!< SRAM base address in the alias region … macro

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