| /hal_stm32-latest/stm32cube/stm32wlxx/drivers/src/ |
| D | stm32wlxx_hal_flash_ex.c | 937 WRITE_REG(FLASH->IPCCBR, (uint32_t)((IPCCDataBufAddr - SRAM1_BASE) >> 4)); in FLASH_OB_IPCCBufferAddrConfig()
970 …((((pOBParam->SecureSRAM1StartAddr - SRAM1_BASE) >> SRAM_SECURE_PAGE_GRANULARITY_OFFSET) << FLASH_… in FLASH_OB_SecureConfig()
1014 …H_SRRVR_SBRV | FLASH_SRRVR_C2OPT), (((pOBParam->C2SecureBootVectAddr - SRAM1_BASE) >> 2) | pOBPara… in FLASH_OB_SecureConfig()
1186 return (uint32_t)((READ_BIT(FLASH->IPCCBR, FLASH_IPCCBR_IPCCDBA) << 4) + SRAM1_BASE); in FLASH_OB_GetIPCCBufferAddr()
1233 *SecureSRAM1StartAddr = ((user_config << SRAM_SECURE_PAGE_GRANULARITY_OFFSET) + SRAM1_BASE); in FLASH_OB_GetSecureMemoryConfig()
1258 *C2BootResetVectAddr = (uint32_t)((READ_BIT(FLASH->SRRVR, FLASH_SRRVR_SBRV) << 2) + SRAM1_BASE); in FLASH_OB_GetC2BootResetConfig()
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| D | stm32wlxx_hal_gtzc.c | 362 case SRAM1_BASE: in HAL_GTZC_TZSC_MPCWM_ConfigMemAttributes()
448 case SRAM1_BASE: in HAL_GTZC_TZSC_MPCWM_GetConfigMemAttributes()
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| /hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/ |
| D | stm32l4xx_hal_firewall.h | 129 …ATILEDATA_SEGMENT_ADDRESS(ADDRESS) (((ADDRESS) >= SRAM1_BASE) && ((ADDRESS) < (SRAM1_BASE +…
130 …LATILEDATA_SEGMENT_LENGTH(ADDRESS, LENGTH) (((ADDRESS) + (LENGTH)) <= (SRAM1_BASE + SRAM1_SIZE_MAX…
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| /hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/ |
| D | stm32wlxx_hal_flash.h | 935 …SNBRSA_START_ADDR(__VALUE__) (((__VALUE__) >= SRAM1_BASE) && ((__VALUE__) <= (SRAM1_BASE …
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| D | stm32wlxx_hal_gtzc.h | 287 … ((__BASE_ADDRESS__) == SRAM1_BASE) || \
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| /hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/ |
| D | stm32wbxx_hal_flash.h | 973 … (((__VALUE__) >= SRAM1_BASE) && ((__VALUE__) <= (SRAM1_BASE + SRAM1_SIZE - 1U))) || \
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| /hal_stm32-latest/stm32cube/stm32wbxx/drivers/src/ |
| D | stm32wbxx_hal_flash_ex.c | 828 (((pOBParam->C2SecureBootVectAddr - SRAM1_BASE) >> 2) | pOBParam->C2BootRegion)); in FLASH_OB_SecureConfig()
1018 *C2BootResetVectAddr = (uint32_t)((READ_BIT(FLASH->SRRVR, FLASH_SRRVR_SBRV) << 2) + SRAM1_BASE); in FLASH_OB_GetC2BootResetConfig()
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| /hal_stm32-latest/stm32cube/stm32l5xx/soc/ |
| D | system_stm32l5xx.c | 144 #define VECT_TAB_BASE_ADDRESS SRAM1_BASE /*!< Vector Table base address field.
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| /hal_stm32-latest/stm32cube/stm32l4xx/soc/ |
| D | system_stm32l4xx.c | 134 #define VECT_TAB_BASE_ADDRESS SRAM1_BASE /*!< Vector Table base address field.
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| /hal_stm32-latest/stm32cube/stm32wlxx/soc/ |
| D | system_stm32wlxx.c | 150 #define VECT_TAB_BASE_ADDRESS SRAM1_BASE /*!< Vector Table base address field.
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| /hal_stm32-latest/stm32cube/stm32wbxx/soc/ |
| D | system_stm32wbxx.c | 138 #define VECT_TAB_BASE_ADDRESS SRAM1_BASE /*!< Vector Table base address field.
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| /hal_stm32-latest/stm32cube/stm32u0xx/soc/ |
| D | system_stm32u0xx.c | 188 SCB->VTOR = SRAM1_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ in SystemInit()
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| D | stm32u031xx.h | 722 #define SRAM1_BASE (0x20000000UL) /*!< SRAM1 base address */ macro
724 #define BKPSRAM2_BASE (SRAM1_BASE + 0x00002000UL) /*!< SRAM2 BKP(up to 4 KB) base address */
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| /hal_stm32-latest/stm32cube/stm32u5xx/soc/ |
| D | system_stm32u5xx.c | 223 SCB->VTOR = SRAM1_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ in SystemInit()
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| D | system_stm32u5xx_s.c | 241 SCB->VTOR = SRAM1_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ in SystemInit()
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| /hal_stm32-latest/stm32cube/stm32wbaxx/soc/ |
| D | system_stm32wbaxx.c | 119 #define VECT_TAB_BASE_ADDRESS SRAM1_BASE /*!< Vector Table base address field.
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| D | system_stm32wbaxx_s.c | 133 #define VECT_TAB_BASE_ADDRESS SRAM1_BASE /*!< Vector Table base address field.
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| /hal_stm32-latest/stm32cube/stm32h5xx/soc/ |
| D | system_stm32h5xx.c | 255 SCB->VTOR = SRAM1_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ in SystemInit()
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| D | system_stm32h5xx_s.c | 264 SCB->VTOR = SRAM1_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ in SystemInit()
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| /hal_stm32-latest/stm32cube/stm32f4xx/soc/ |
| D | stm32f410cx.h | 562 #define SRAM1_BASE 0x20000000UL /*!< SRAM1(32 KB) base address in the alias region … macro
571 #define SRAM_BASE SRAM1_BASE
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| D | stm32f410rx.h | 562 #define SRAM1_BASE 0x20000000UL /*!< SRAM1(32 KB) base address in the alias region … macro
571 #define SRAM_BASE SRAM1_BASE
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| D | stm32f410tx.h | 559 #define SRAM1_BASE 0x20000000UL /*!< SRAM1(32 KB) base address in the alias region … macro
568 #define SRAM_BASE SRAM1_BASE
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| D | stm32f401xc.h | 636 #define SRAM1_BASE 0x20000000UL /*!< SRAM1(64 KB) base address in the alias region … macro
646 #define SRAM_BASE SRAM1_BASE
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| D | stm32f401xe.h | 636 #define SRAM1_BASE 0x20000000UL /*!< SRAM1(96 KB) base address in the alias region … macro
646 #define SRAM_BASE SRAM1_BASE
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| D | stm32f411xe.h | 637 #define SRAM1_BASE 0x20000000UL /*!< SRAM1(128 KB) base address in the alias region … macro
647 #define SRAM_BASE SRAM1_BASE
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