/hal_stm32-latest/stm32cube/stm32l0xx/soc/ |
D | stm32l051xx.h | 4766 #define SPI_I2SCFGR_CHLEN_Pos (0U) macro 4767 #define SPI_I2SCFGR_CHLEN_Msk (0x1UL << SPI_I2SCFGR_CHLEN_Pos) /*!< 0x00000001 */
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D | stm32l081xx.h | 5037 #define SPI_I2SCFGR_CHLEN_Pos (0U) macro 5038 #define SPI_I2SCFGR_CHLEN_Msk (0x1UL << SPI_I2SCFGR_CHLEN_Pos) /*!< 0x00000001 */
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D | stm32l071xx.h | 4900 #define SPI_I2SCFGR_CHLEN_Pos (0U) macro 4901 #define SPI_I2SCFGR_CHLEN_Msk (0x1UL << SPI_I2SCFGR_CHLEN_Pos) /*!< 0x00000001 */
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D | stm32l052xx.h | 5159 #define SPI_I2SCFGR_CHLEN_Pos (0U) macro 5160 #define SPI_I2SCFGR_CHLEN_Msk (0x1UL << SPI_I2SCFGR_CHLEN_Pos) /*!< 0x00000001 */
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D | stm32l062xx.h | 5296 #define SPI_I2SCFGR_CHLEN_Pos (0U) macro 5297 #define SPI_I2SCFGR_CHLEN_Msk (0x1UL << SPI_I2SCFGR_CHLEN_Pos) /*!< 0x00000001 */
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D | stm32l053xx.h | 5312 #define SPI_I2SCFGR_CHLEN_Pos (0U) macro 5313 #define SPI_I2SCFGR_CHLEN_Msk (0x1UL << SPI_I2SCFGR_CHLEN_Pos) /*!< 0x00000001 */
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D | stm32l072xx.h | 5397 #define SPI_I2SCFGR_CHLEN_Pos (0U) macro 5398 #define SPI_I2SCFGR_CHLEN_Msk (0x1UL << SPI_I2SCFGR_CHLEN_Pos) /*!< 0x00000001 */
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D | stm32l073xx.h | 5548 #define SPI_I2SCFGR_CHLEN_Pos (0U) macro 5549 #define SPI_I2SCFGR_CHLEN_Msk (0x1UL << SPI_I2SCFGR_CHLEN_Pos) /*!< 0x00000001 */
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D | stm32l083xx.h | 5685 #define SPI_I2SCFGR_CHLEN_Pos (0U) macro 5686 #define SPI_I2SCFGR_CHLEN_Msk (0x1UL << SPI_I2SCFGR_CHLEN_Pos) /*!< 0x00000001 */
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D | stm32l063xx.h | 5447 #define SPI_I2SCFGR_CHLEN_Pos (0U) macro 5448 #define SPI_I2SCFGR_CHLEN_Msk (0x1UL << SPI_I2SCFGR_CHLEN_Pos) /*!< 0x00000001 */
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D | stm32l082xx.h | 5534 #define SPI_I2SCFGR_CHLEN_Pos (0U) macro 5535 #define SPI_I2SCFGR_CHLEN_Msk (0x1UL << SPI_I2SCFGR_CHLEN_Pos) /*!< 0x00000001 */
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/hal_stm32-latest/stm32cube/stm32f0xx/soc/ |
D | stm32f031x6.h | 4059 #define SPI_I2SCFGR_CHLEN_Pos (0U) macro 4060 #define SPI_I2SCFGR_CHLEN_Msk (0x1UL << SPI_I2SCFGR_CHLEN_Pos) /*!< 0x00000001 */
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D | stm32f038xx.h | 4031 #define SPI_I2SCFGR_CHLEN_Pos (0U) macro 4032 #define SPI_I2SCFGR_CHLEN_Msk (0x1UL << SPI_I2SCFGR_CHLEN_Pos) /*!< 0x00000001 */
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D | stm32f058xx.h | 4531 #define SPI_I2SCFGR_CHLEN_Pos (0U) macro 4532 #define SPI_I2SCFGR_CHLEN_Msk (0x1UL << SPI_I2SCFGR_CHLEN_Pos) /*!< 0x00000001 */
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D | stm32f051x8.h | 4559 #define SPI_I2SCFGR_CHLEN_Pos (0U) macro 4560 #define SPI_I2SCFGR_CHLEN_Msk (0x1UL << SPI_I2SCFGR_CHLEN_Pos) /*!< 0x00000001 */
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D | stm32f071xb.h | 5069 #define SPI_I2SCFGR_CHLEN_Pos (0U) macro 5070 #define SPI_I2SCFGR_CHLEN_Msk (0x1UL << SPI_I2SCFGR_CHLEN_Pos) /*!< 0x00000001 */
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/hal_stm32-latest/stm32cube/stm32f1xx/soc/ |
D | stm32f101xg.h | 5490 #define SPI_I2SCFGR_CHLEN_Pos (0U) macro 5491 #define SPI_I2SCFGR_CHLEN_Msk (0x1UL << SPI_I2SCFGR_CHLEN_Pos) /*!< 0x00000001 */
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D | stm32f101xe.h | 5416 #define SPI_I2SCFGR_CHLEN_Pos (0U) macro 5417 #define SPI_I2SCFGR_CHLEN_Msk (0x1UL << SPI_I2SCFGR_CHLEN_Pos) /*!< 0x00000001 */
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/hal_stm32-latest/stm32cube/stm32c0xx/soc/ |
D | stm32c011xx.h | 4875 #define SPI_I2SCFGR_CHLEN_Pos (0U) macro 4876 #define SPI_I2SCFGR_CHLEN_Msk (0x1UL << SPI_I2SCFGR_CHLEN_Pos) /*!< 0x00000001 */
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D | stm32c031xx.h | 5038 #define SPI_I2SCFGR_CHLEN_Pos (0U) macro 5039 #define SPI_I2SCFGR_CHLEN_Msk (0x1UL << SPI_I2SCFGR_CHLEN_Pos) /*!< 0x00000001 */
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D | stm32c071xx.h | 5525 #define SPI_I2SCFGR_CHLEN_Pos (0U) macro 5526 #define SPI_I2SCFGR_CHLEN_Msk (0x1UL << SPI_I2SCFGR_CHLEN_Pos) /*!< 0x00000001 */
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/hal_stm32-latest/stm32cube/stm32f4xx/soc/ |
D | stm32f410cx.h | 5716 #define SPI_I2SCFGR_CHLEN_Pos (0U) macro 5717 #define SPI_I2SCFGR_CHLEN_Msk (0x1UL << SPI_I2SCFGR_CHLEN_Pos) /*!< 0x00000001 */
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D | stm32f410rx.h | 5720 #define SPI_I2SCFGR_CHLEN_Pos (0U) macro 5721 #define SPI_I2SCFGR_CHLEN_Msk (0x1UL << SPI_I2SCFGR_CHLEN_Pos) /*!< 0x00000001 */
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D | stm32f410tx.h | 5676 #define SPI_I2SCFGR_CHLEN_Pos (0U) macro 5677 #define SPI_I2SCFGR_CHLEN_Msk (0x1UL << SPI_I2SCFGR_CHLEN_Pos) /*!< 0x00000001 */
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/hal_stm32-latest/stm32cube/stm32g0xx/soc/ |
D | stm32g030xx.h | 5463 #define SPI_I2SCFGR_CHLEN_Pos (0U) macro 5464 #define SPI_I2SCFGR_CHLEN_Msk (0x1UL << SPI_I2SCFGR_CHLEN_Pos) /*!< 0x00000001 */
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