Home
last modified time | relevance | path

Searched refs:SPI_CR1_MASRX (Results 1 – 25 of 98) sorted by relevance

1234

/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_spi.h1071 SET_BIT(SPIx->CR1, SPI_CR1_MASRX); in LL_SPI_EnableMasterRxAutoSuspend()
1082 CLEAR_BIT(SPIx->CR1, SPI_CR1_MASRX); in LL_SPI_DisableMasterRxAutoSuspend()
1093 return ((READ_BIT(SPIx->CR1, SPI_CR1_MASRX) == (SPI_CR1_MASRX)) ? 1UL : 0UL); in LL_SPI_IsEnabledMasterRxAutoSuspend()
Dstm32u5xx_hal_spi.h558 #define SPI_MASTER_RX_AUTOSUSP_ENABLE SPI_CR1_MASRX
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_spi.h1066 SET_BIT(SPIx->CR1, SPI_CR1_MASRX); in LL_SPI_EnableMasterRxAutoSuspend()
1077 CLEAR_BIT(SPIx->CR1, SPI_CR1_MASRX); in LL_SPI_DisableMasterRxAutoSuspend()
1088 return ((READ_BIT(SPIx->CR1, SPI_CR1_MASRX) == (SPI_CR1_MASRX)) ? 1UL : 0UL); in LL_SPI_IsEnabledMasterRxAutoSuspend()
Dstm32wbaxx_hal_spi.h558 #define SPI_MASTER_RX_AUTOSUSP_ENABLE SPI_CR1_MASRX
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_spi.h984 SET_BIT(SPIx->CR1, SPI_CR1_MASRX); in LL_SPI_EnableMasterRxAutoSuspend()
995 CLEAR_BIT(SPIx->CR1, SPI_CR1_MASRX); in LL_SPI_DisableMasterRxAutoSuspend()
1006 return ((READ_BIT(SPIx->CR1, SPI_CR1_MASRX) == (SPI_CR1_MASRX)) ? 1UL : 0UL); in LL_SPI_IsEnabledMasterRxAutoSuspend()
Dstm32h5xx_hal_spi.h562 #define SPI_MASTER_RX_AUTOSUSP_ENABLE SPI_CR1_MASRX
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_ll_spi.h1021 SET_BIT(SPIx->CR1, SPI_CR1_MASRX); in LL_SPI_EnableMasterRxAutoSuspend()
1032 CLEAR_BIT(SPIx->CR1, SPI_CR1_MASRX); in LL_SPI_DisableMasterRxAutoSuspend()
1043 return ((READ_BIT(SPIx->CR1, SPI_CR1_MASRX) == (SPI_CR1_MASRX)) ? 1UL : 0UL); in LL_SPI_IsEnabledMasterRxAutoSuspend()
Dstm32mp1xx_hal_spi.h574 #define SPI_MASTER_RX_AUTOSUSP_ENABLE SPI_CR1_MASRX
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_spi.h984 SET_BIT(SPIx->CR1, SPI_CR1_MASRX); in LL_SPI_EnableMasterRxAutoSuspend()
995 CLEAR_BIT(SPIx->CR1, SPI_CR1_MASRX); in LL_SPI_DisableMasterRxAutoSuspend()
1006 return ((READ_BIT(SPIx->CR1, SPI_CR1_MASRX) == (SPI_CR1_MASRX)) ? 1UL : 0UL); in LL_SPI_IsEnabledMasterRxAutoSuspend()
Dstm32h7rsxx_hal_spi.h558 #define SPI_MASTER_RX_AUTOSUSP_ENABLE SPI_CR1_MASRX
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_spi.h1021 SET_BIT(SPIx->CR1, SPI_CR1_MASRX); in LL_SPI_EnableMasterRxAutoSuspend()
1032 CLEAR_BIT(SPIx->CR1, SPI_CR1_MASRX); in LL_SPI_DisableMasterRxAutoSuspend()
1043 return ((READ_BIT(SPIx->CR1, SPI_CR1_MASRX) == (SPI_CR1_MASRX)) ? 1UL : 0UL); in LL_SPI_IsEnabledMasterRxAutoSuspend()
Dstm32h7xx_hal_spi.h574 #define SPI_MASTER_RX_AUTOSUSP_ENABLE SPI_CR1_MASRX
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_spi.h984 SET_BIT(SPIx->CR1, SPI_CR1_MASRX); in LL_SPI_EnableMasterRxAutoSuspend()
995 CLEAR_BIT(SPIx->CR1, SPI_CR1_MASRX); in LL_SPI_DisableMasterRxAutoSuspend()
1006 return ((READ_BIT(SPIx->CR1, SPI_CR1_MASRX) == (SPI_CR1_MASRX)) ? 1UL : 0UL); in LL_SPI_IsEnabledMasterRxAutoSuspend()
Dstm32n6xx_hal_spi.h558 #define SPI_MASTER_RX_AUTOSUSP_ENABLE SPI_CR1_MASRX
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_spi.c398 MODIFY_REG(hspi->Instance->CR1, SPI_CR1_MASRX, hspi->Init.MasterReceiverAutoSusp); in HAL_SPI_Init()
402 CLEAR_BIT(hspi->Instance->CR1, SPI_CR1_MASRX); in HAL_SPI_Init()
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/src/
Dstm32mp1xx_hal_spi.c382 MODIFY_REG(hspi->Instance->CR1, SPI_CR1_MASRX, hspi->Init.MasterReceiverAutoSusp); in HAL_SPI_Init()
386 CLEAR_BIT(hspi->Instance->CR1, SPI_CR1_MASRX); in HAL_SPI_Init()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_spi.c400 MODIFY_REG(hspi->Instance->CR1, SPI_CR1_MASRX, hspi->Init.MasterReceiverAutoSusp); in HAL_SPI_Init()
404 CLEAR_BIT(hspi->Instance->CR1, SPI_CR1_MASRX); in HAL_SPI_Init()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_spi.c404 MODIFY_REG(hspi->Instance->CR1, SPI_CR1_MASRX, hspi->Init.MasterReceiverAutoSusp); in HAL_SPI_Init()
408 CLEAR_BIT(hspi->Instance->CR1, SPI_CR1_MASRX); in HAL_SPI_Init()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_spi.c404 MODIFY_REG(hspi->Instance->CR1, SPI_CR1_MASRX, hspi->Init.MasterReceiverAutoSusp); in HAL_SPI_Init()
408 CLEAR_BIT(hspi->Instance->CR1, SPI_CR1_MASRX); in HAL_SPI_Init()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_spi.c386 MODIFY_REG(hspi->Instance->CR1, SPI_CR1_MASRX, hspi->Init.MasterReceiverAutoSusp); in HAL_SPI_Init()
390 CLEAR_BIT(hspi->Instance->CR1, SPI_CR1_MASRX); in HAL_SPI_Init()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_spi.c406 MODIFY_REG(hspi->Instance->CR1, SPI_CR1_MASRX, hspi->Init.MasterReceiverAutoSusp); in HAL_SPI_Init()
410 CLEAR_BIT(hspi->Instance->CR1, SPI_CR1_MASRX); in HAL_SPI_Init()
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h7252 #define SPI_CR1_MASRX SPI_CR1_MASRX_Msk /*!<Master auto… macro
Dstm32wba52xx.h11255 #define SPI_CR1_MASRX SPI_CR1_MASRX_Msk /*!<Master auto… macro
Dstm32wba54xx.h11963 #define SPI_CR1_MASRX SPI_CR1_MASRX_Msk /*!<Master auto… macro
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h12469 #define SPI_CR1_MASRX SPI_CR1_MASRX_Msk /*!<Master auto… macro

1234