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Searched refs:SPI_CFG2_AFCNTR (Results 1 – 25 of 106) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_spi.h702 SET_BIT(SPIx->CFG2, SPI_CFG2_AFCNTR); in LL_SPI_EnableGPIOControl()
714 CLEAR_BIT(SPIx->CFG2, SPI_CFG2_AFCNTR); in LL_SPI_DisableGPIOControl()
725 return ((READ_BIT(SPIx->CFG2, SPI_CFG2_AFCNTR) == (SPI_CFG2_AFCNTR)) ? 1UL : 0UL); in LL_SPI_IsEnabledGPIOControl()
Dstm32u5xx_hal_spi.h494 #define SPI_MASTER_KEEP_IO_STATE_ENABLE SPI_CFG2_AFCNTR
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_spi.h697 SET_BIT(SPIx->CFG2, SPI_CFG2_AFCNTR); in LL_SPI_EnableGPIOControl()
709 CLEAR_BIT(SPIx->CFG2, SPI_CFG2_AFCNTR); in LL_SPI_DisableGPIOControl()
720 return ((READ_BIT(SPIx->CFG2, SPI_CFG2_AFCNTR) == (SPI_CFG2_AFCNTR)) ? 1UL : 0UL); in LL_SPI_IsEnabledGPIOControl()
Dstm32wbaxx_hal_spi.h494 #define SPI_MASTER_KEEP_IO_STATE_ENABLE SPI_CFG2_AFCNTR
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_spi.h615 SET_BIT(SPIx->CFG2, SPI_CFG2_AFCNTR); in LL_SPI_EnableGPIOControl()
627 CLEAR_BIT(SPIx->CFG2, SPI_CFG2_AFCNTR); in LL_SPI_DisableGPIOControl()
638 return ((READ_BIT(SPIx->CFG2, SPI_CFG2_AFCNTR) == (SPI_CFG2_AFCNTR)) ? 1UL : 0UL); in LL_SPI_IsEnabledGPIOControl()
Dstm32h5xx_hal_i2s.h304 #define I2S_MASTER_KEEP_IO_STATE_ENABLE SPI_CFG2_AFCNTR
Dstm32h5xx_hal_spi.h498 #define SPI_MASTER_KEEP_IO_STATE_ENABLE SPI_CFG2_AFCNTR
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_ll_spi.h627 SET_BIT(SPIx->CFG2, SPI_CFG2_AFCNTR); in LL_SPI_EnableGPIOControl()
639 CLEAR_BIT(SPIx->CFG2, SPI_CFG2_AFCNTR); in LL_SPI_DisableGPIOControl()
650 return ((READ_BIT(SPIx->CFG2, SPI_CFG2_AFCNTR) == (SPI_CFG2_AFCNTR)) ? 1UL : 0UL); in LL_SPI_IsEnabledGPIOControl()
Dstm32mp1xx_hal_spi.h510 #define SPI_MASTER_KEEP_IO_STATE_ENABLE SPI_CFG2_AFCNTR
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_spi.h615 SET_BIT(SPIx->CFG2, SPI_CFG2_AFCNTR); in LL_SPI_EnableGPIOControl()
627 CLEAR_BIT(SPIx->CFG2, SPI_CFG2_AFCNTR); in LL_SPI_DisableGPIOControl()
638 return ((READ_BIT(SPIx->CFG2, SPI_CFG2_AFCNTR) == (SPI_CFG2_AFCNTR)) ? 1UL : 0UL); in LL_SPI_IsEnabledGPIOControl()
Dstm32h7rsxx_hal_i2s.h304 #define I2S_MASTER_KEEP_IO_STATE_ENABLE SPI_CFG2_AFCNTR
Dstm32h7rsxx_hal_spi.h494 #define SPI_MASTER_KEEP_IO_STATE_ENABLE SPI_CFG2_AFCNTR
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_spi.h627 SET_BIT(SPIx->CFG2, SPI_CFG2_AFCNTR); in LL_SPI_EnableGPIOControl()
639 CLEAR_BIT(SPIx->CFG2, SPI_CFG2_AFCNTR); in LL_SPI_DisableGPIOControl()
650 return ((READ_BIT(SPIx->CFG2, SPI_CFG2_AFCNTR) == (SPI_CFG2_AFCNTR)) ? 1UL : 0UL); in LL_SPI_IsEnabledGPIOControl()
Dstm32h7xx_hal_i2s.h304 #define I2S_MASTER_KEEP_IO_STATE_ENABLE SPI_CFG2_AFCNTR
Dstm32h7xx_hal_spi.h510 #define SPI_MASTER_KEEP_IO_STATE_ENABLE SPI_CFG2_AFCNTR
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_spi.h615 SET_BIT(SPIx->CFG2, SPI_CFG2_AFCNTR); in LL_SPI_EnableGPIOControl()
627 CLEAR_BIT(SPIx->CFG2, SPI_CFG2_AFCNTR); in LL_SPI_DisableGPIOControl()
638 return ((READ_BIT(SPIx->CFG2, SPI_CFG2_AFCNTR) == (SPI_CFG2_AFCNTR)) ? 1UL : 0UL); in LL_SPI_IsEnabledGPIOControl()
Dstm32n6xx_hal_i2s.h304 #define I2S_MASTER_KEEP_IO_STATE_ENABLE SPI_CFG2_AFCNTR
Dstm32n6xx_hal_spi.h494 #define SPI_MASTER_KEEP_IO_STATE_ENABLE SPI_CFG2_AFCNTR
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_i2s.c453 MODIFY_REG(hi2s->Instance->CFG2, SPI_CFG2_AFCNTR, (hi2s->Init.MasterKeepIOState)); in HAL_I2S_Init()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_i2s.c454 MODIFY_REG(hi2s->Instance->CFG2, SPI_CFG2_AFCNTR, (hi2s->Init.MasterKeepIOState)); in HAL_I2S_Init()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_i2s.c450 MODIFY_REG(hi2s->Instance->CFG2, SPI_CFG2_AFCNTR, (hi2s->Init.MasterKeepIOState)); in HAL_I2S_Init()
Dstm32h7rsxx_hal_spi.c478 MODIFY_REG(hspi->Instance->CFG2, SPI_CFG2_AFCNTR, (hspi->Init.MasterKeepIOState)); in HAL_SPI_Init()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_i2s.c450 MODIFY_REG(hi2s->Instance->CFG2, SPI_CFG2_AFCNTR, (hi2s->Init.MasterKeepIOState)); in HAL_I2S_Init()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_spi.c476 MODIFY_REG(hspi->Instance->CFG2, SPI_CFG2_AFCNTR, (hspi->Init.MasterKeepIOState)); in HAL_SPI_Init()
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/src/
Dstm32mp1xx_hal_spi.c464 MODIFY_REG(hspi->Instance->CFG2, SPI_CFG2_AFCNTR, (hspi->Init.MasterKeepIOState)); in HAL_SPI_Init()

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