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Searched refs:RI_HYSCR3_PE_Pos (Results 1 – 22 of 22) sorted by relevance

/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dstm32l152xb.h5658 #define RI_HYSCR3_PE_Pos (0U) macro
5659 #define RI_HYSCR3_PE_Msk (0xFFFFUL << RI_HYSCR3_PE_Pos) /*!< 0x0000FFFF */
5661 #define RI_HYSCR3_PE_0 (0x0001UL << RI_HYSCR3_PE_Pos) /*!< 0x00000001 */
5662 #define RI_HYSCR3_PE_1 (0x0002UL << RI_HYSCR3_PE_Pos) /*!< 0x00000002 */
5663 #define RI_HYSCR3_PE_2 (0x0004UL << RI_HYSCR3_PE_Pos) /*!< 0x00000004 */
5664 #define RI_HYSCR3_PE_3 (0x0008UL << RI_HYSCR3_PE_Pos) /*!< 0x00000008 */
5665 #define RI_HYSCR3_PE_4 (0x0010UL << RI_HYSCR3_PE_Pos) /*!< 0x00000010 */
5666 #define RI_HYSCR3_PE_5 (0x0020UL << RI_HYSCR3_PE_Pos) /*!< 0x00000020 */
5667 #define RI_HYSCR3_PE_6 (0x0040UL << RI_HYSCR3_PE_Pos) /*!< 0x00000040 */
5668 #define RI_HYSCR3_PE_7 (0x0080UL << RI_HYSCR3_PE_Pos) /*!< 0x00000080 */
[all …]
Dstm32l152xba.h5719 #define RI_HYSCR3_PE_Pos (0U) macro
5720 #define RI_HYSCR3_PE_Msk (0xFFFFUL << RI_HYSCR3_PE_Pos) /*!< 0x0000FFFF */
5722 #define RI_HYSCR3_PE_0 (0x0001UL << RI_HYSCR3_PE_Pos) /*!< 0x00000001 */
5723 #define RI_HYSCR3_PE_1 (0x0002UL << RI_HYSCR3_PE_Pos) /*!< 0x00000002 */
5724 #define RI_HYSCR3_PE_2 (0x0004UL << RI_HYSCR3_PE_Pos) /*!< 0x00000004 */
5725 #define RI_HYSCR3_PE_3 (0x0008UL << RI_HYSCR3_PE_Pos) /*!< 0x00000008 */
5726 #define RI_HYSCR3_PE_4 (0x0010UL << RI_HYSCR3_PE_Pos) /*!< 0x00000010 */
5727 #define RI_HYSCR3_PE_5 (0x0020UL << RI_HYSCR3_PE_Pos) /*!< 0x00000020 */
5728 #define RI_HYSCR3_PE_6 (0x0040UL << RI_HYSCR3_PE_Pos) /*!< 0x00000040 */
5729 #define RI_HYSCR3_PE_7 (0x0080UL << RI_HYSCR3_PE_Pos) /*!< 0x00000080 */
[all …]
Dstm32l100xba.h5704 #define RI_HYSCR3_PE_Pos (0U) macro
5705 #define RI_HYSCR3_PE_Msk (0xFFFFUL << RI_HYSCR3_PE_Pos) /*!< 0x0000FFFF */
5707 #define RI_HYSCR3_PE_0 (0x0001UL << RI_HYSCR3_PE_Pos) /*!< 0x00000001 */
5708 #define RI_HYSCR3_PE_1 (0x0002UL << RI_HYSCR3_PE_Pos) /*!< 0x00000002 */
5709 #define RI_HYSCR3_PE_2 (0x0004UL << RI_HYSCR3_PE_Pos) /*!< 0x00000004 */
5710 #define RI_HYSCR3_PE_3 (0x0008UL << RI_HYSCR3_PE_Pos) /*!< 0x00000008 */
5711 #define RI_HYSCR3_PE_4 (0x0010UL << RI_HYSCR3_PE_Pos) /*!< 0x00000010 */
5712 #define RI_HYSCR3_PE_5 (0x0020UL << RI_HYSCR3_PE_Pos) /*!< 0x00000020 */
5713 #define RI_HYSCR3_PE_6 (0x0040UL << RI_HYSCR3_PE_Pos) /*!< 0x00000040 */
5714 #define RI_HYSCR3_PE_7 (0x0080UL << RI_HYSCR3_PE_Pos) /*!< 0x00000080 */
[all …]
Dstm32l100xb.h5556 #define RI_HYSCR3_PE_Pos (0U) macro
5557 #define RI_HYSCR3_PE_Msk (0xFFFFUL << RI_HYSCR3_PE_Pos) /*!< 0x0000FFFF */
5559 #define RI_HYSCR3_PE_0 (0x0001UL << RI_HYSCR3_PE_Pos) /*!< 0x00000001 */
5560 #define RI_HYSCR3_PE_1 (0x0002UL << RI_HYSCR3_PE_Pos) /*!< 0x00000002 */
5561 #define RI_HYSCR3_PE_2 (0x0004UL << RI_HYSCR3_PE_Pos) /*!< 0x00000004 */
5562 #define RI_HYSCR3_PE_3 (0x0008UL << RI_HYSCR3_PE_Pos) /*!< 0x00000008 */
5563 #define RI_HYSCR3_PE_4 (0x0010UL << RI_HYSCR3_PE_Pos) /*!< 0x00000010 */
5564 #define RI_HYSCR3_PE_5 (0x0020UL << RI_HYSCR3_PE_Pos) /*!< 0x00000020 */
5565 #define RI_HYSCR3_PE_6 (0x0040UL << RI_HYSCR3_PE_Pos) /*!< 0x00000040 */
5566 #define RI_HYSCR3_PE_7 (0x0080UL << RI_HYSCR3_PE_Pos) /*!< 0x00000080 */
[all …]
Dstm32l151xb.h5508 #define RI_HYSCR3_PE_Pos (0U) macro
5509 #define RI_HYSCR3_PE_Msk (0xFFFFUL << RI_HYSCR3_PE_Pos) /*!< 0x0000FFFF */
5511 #define RI_HYSCR3_PE_0 (0x0001UL << RI_HYSCR3_PE_Pos) /*!< 0x00000001 */
5512 #define RI_HYSCR3_PE_1 (0x0002UL << RI_HYSCR3_PE_Pos) /*!< 0x00000002 */
5513 #define RI_HYSCR3_PE_2 (0x0004UL << RI_HYSCR3_PE_Pos) /*!< 0x00000004 */
5514 #define RI_HYSCR3_PE_3 (0x0008UL << RI_HYSCR3_PE_Pos) /*!< 0x00000008 */
5515 #define RI_HYSCR3_PE_4 (0x0010UL << RI_HYSCR3_PE_Pos) /*!< 0x00000010 */
5516 #define RI_HYSCR3_PE_5 (0x0020UL << RI_HYSCR3_PE_Pos) /*!< 0x00000020 */
5517 #define RI_HYSCR3_PE_6 (0x0040UL << RI_HYSCR3_PE_Pos) /*!< 0x00000040 */
5518 #define RI_HYSCR3_PE_7 (0x0080UL << RI_HYSCR3_PE_Pos) /*!< 0x00000080 */
[all …]
Dstm32l151xba.h5584 #define RI_HYSCR3_PE_Pos (0U) macro
5585 #define RI_HYSCR3_PE_Msk (0xFFFFUL << RI_HYSCR3_PE_Pos) /*!< 0x0000FFFF */
5587 #define RI_HYSCR3_PE_0 (0x0001UL << RI_HYSCR3_PE_Pos) /*!< 0x00000001 */
5588 #define RI_HYSCR3_PE_1 (0x0002UL << RI_HYSCR3_PE_Pos) /*!< 0x00000002 */
5589 #define RI_HYSCR3_PE_2 (0x0004UL << RI_HYSCR3_PE_Pos) /*!< 0x00000004 */
5590 #define RI_HYSCR3_PE_3 (0x0008UL << RI_HYSCR3_PE_Pos) /*!< 0x00000008 */
5591 #define RI_HYSCR3_PE_4 (0x0010UL << RI_HYSCR3_PE_Pos) /*!< 0x00000010 */
5592 #define RI_HYSCR3_PE_5 (0x0020UL << RI_HYSCR3_PE_Pos) /*!< 0x00000020 */
5593 #define RI_HYSCR3_PE_6 (0x0040UL << RI_HYSCR3_PE_Pos) /*!< 0x00000040 */
5594 #define RI_HYSCR3_PE_7 (0x0080UL << RI_HYSCR3_PE_Pos) /*!< 0x00000080 */
[all …]
Dstm32l100xc.h5919 #define RI_HYSCR3_PE_Pos (0U) macro
5920 #define RI_HYSCR3_PE_Msk (0xFFFFUL << RI_HYSCR3_PE_Pos) /*!< 0x0000FFFF */
5922 #define RI_HYSCR3_PE_0 (0x0001UL << RI_HYSCR3_PE_Pos) /*!< 0x00000001 */
5923 #define RI_HYSCR3_PE_1 (0x0002UL << RI_HYSCR3_PE_Pos) /*!< 0x00000002 */
5924 #define RI_HYSCR3_PE_2 (0x0004UL << RI_HYSCR3_PE_Pos) /*!< 0x00000004 */
5925 #define RI_HYSCR3_PE_3 (0x0008UL << RI_HYSCR3_PE_Pos) /*!< 0x00000008 */
5926 #define RI_HYSCR3_PE_4 (0x0010UL << RI_HYSCR3_PE_Pos) /*!< 0x00000010 */
5927 #define RI_HYSCR3_PE_5 (0x0020UL << RI_HYSCR3_PE_Pos) /*!< 0x00000020 */
5928 #define RI_HYSCR3_PE_6 (0x0040UL << RI_HYSCR3_PE_Pos) /*!< 0x00000040 */
5929 #define RI_HYSCR3_PE_7 (0x0080UL << RI_HYSCR3_PE_Pos) /*!< 0x00000080 */
[all …]
Dstm32l151xc.h6108 #define RI_HYSCR3_PE_Pos (0U) macro
6109 #define RI_HYSCR3_PE_Msk (0xFFFFUL << RI_HYSCR3_PE_Pos) /*!< 0x0000FFFF */
6111 #define RI_HYSCR3_PE_0 (0x0001UL << RI_HYSCR3_PE_Pos) /*!< 0x00000001 */
6112 #define RI_HYSCR3_PE_1 (0x0002UL << RI_HYSCR3_PE_Pos) /*!< 0x00000002 */
6113 #define RI_HYSCR3_PE_2 (0x0004UL << RI_HYSCR3_PE_Pos) /*!< 0x00000004 */
6114 #define RI_HYSCR3_PE_3 (0x0008UL << RI_HYSCR3_PE_Pos) /*!< 0x00000008 */
6115 #define RI_HYSCR3_PE_4 (0x0010UL << RI_HYSCR3_PE_Pos) /*!< 0x00000010 */
6116 #define RI_HYSCR3_PE_5 (0x0020UL << RI_HYSCR3_PE_Pos) /*!< 0x00000020 */
6117 #define RI_HYSCR3_PE_6 (0x0040UL << RI_HYSCR3_PE_Pos) /*!< 0x00000040 */
6118 #define RI_HYSCR3_PE_7 (0x0080UL << RI_HYSCR3_PE_Pos) /*!< 0x00000080 */
[all …]
Dstm32l151xca.h6172 #define RI_HYSCR3_PE_Pos (0U) macro
6173 #define RI_HYSCR3_PE_Msk (0xFFFFUL << RI_HYSCR3_PE_Pos) /*!< 0x0000FFFF */
6175 #define RI_HYSCR3_PE_0 (0x0001UL << RI_HYSCR3_PE_Pos) /*!< 0x00000001 */
6176 #define RI_HYSCR3_PE_1 (0x0002UL << RI_HYSCR3_PE_Pos) /*!< 0x00000002 */
6177 #define RI_HYSCR3_PE_2 (0x0004UL << RI_HYSCR3_PE_Pos) /*!< 0x00000004 */
6178 #define RI_HYSCR3_PE_3 (0x0008UL << RI_HYSCR3_PE_Pos) /*!< 0x00000008 */
6179 #define RI_HYSCR3_PE_4 (0x0010UL << RI_HYSCR3_PE_Pos) /*!< 0x00000010 */
6180 #define RI_HYSCR3_PE_5 (0x0020UL << RI_HYSCR3_PE_Pos) /*!< 0x00000020 */
6181 #define RI_HYSCR3_PE_6 (0x0040UL << RI_HYSCR3_PE_Pos) /*!< 0x00000040 */
6182 #define RI_HYSCR3_PE_7 (0x0080UL << RI_HYSCR3_PE_Pos) /*!< 0x00000080 */
[all …]
Dstm32l151xdx.h6237 #define RI_HYSCR3_PE_Pos (0U) macro
6238 #define RI_HYSCR3_PE_Msk (0xFFFFUL << RI_HYSCR3_PE_Pos) /*!< 0x0000FFFF */
6240 #define RI_HYSCR3_PE_0 (0x0001UL << RI_HYSCR3_PE_Pos) /*!< 0x00000001 */
6241 #define RI_HYSCR3_PE_1 (0x0002UL << RI_HYSCR3_PE_Pos) /*!< 0x00000002 */
6242 #define RI_HYSCR3_PE_2 (0x0004UL << RI_HYSCR3_PE_Pos) /*!< 0x00000004 */
6243 #define RI_HYSCR3_PE_3 (0x0008UL << RI_HYSCR3_PE_Pos) /*!< 0x00000008 */
6244 #define RI_HYSCR3_PE_4 (0x0010UL << RI_HYSCR3_PE_Pos) /*!< 0x00000010 */
6245 #define RI_HYSCR3_PE_5 (0x0020UL << RI_HYSCR3_PE_Pos) /*!< 0x00000020 */
6246 #define RI_HYSCR3_PE_6 (0x0040UL << RI_HYSCR3_PE_Pos) /*!< 0x00000040 */
6247 #define RI_HYSCR3_PE_7 (0x0080UL << RI_HYSCR3_PE_Pos) /*!< 0x00000080 */
[all …]
Dstm32l151xe.h6237 #define RI_HYSCR3_PE_Pos (0U) macro
6238 #define RI_HYSCR3_PE_Msk (0xFFFFUL << RI_HYSCR3_PE_Pos) /*!< 0x0000FFFF */
6240 #define RI_HYSCR3_PE_0 (0x0001UL << RI_HYSCR3_PE_Pos) /*!< 0x00000001 */
6241 #define RI_HYSCR3_PE_1 (0x0002UL << RI_HYSCR3_PE_Pos) /*!< 0x00000002 */
6242 #define RI_HYSCR3_PE_2 (0x0004UL << RI_HYSCR3_PE_Pos) /*!< 0x00000004 */
6243 #define RI_HYSCR3_PE_3 (0x0008UL << RI_HYSCR3_PE_Pos) /*!< 0x00000008 */
6244 #define RI_HYSCR3_PE_4 (0x0010UL << RI_HYSCR3_PE_Pos) /*!< 0x00000010 */
6245 #define RI_HYSCR3_PE_5 (0x0020UL << RI_HYSCR3_PE_Pos) /*!< 0x00000020 */
6246 #define RI_HYSCR3_PE_6 (0x0040UL << RI_HYSCR3_PE_Pos) /*!< 0x00000040 */
6247 #define RI_HYSCR3_PE_7 (0x0080UL << RI_HYSCR3_PE_Pos) /*!< 0x00000080 */
[all …]
Dstm32l152xc.h6237 #define RI_HYSCR3_PE_Pos (0U) macro
6238 #define RI_HYSCR3_PE_Msk (0xFFFFUL << RI_HYSCR3_PE_Pos) /*!< 0x0000FFFF */
6240 #define RI_HYSCR3_PE_0 (0x0001UL << RI_HYSCR3_PE_Pos) /*!< 0x00000001 */
6241 #define RI_HYSCR3_PE_1 (0x0002UL << RI_HYSCR3_PE_Pos) /*!< 0x00000002 */
6242 #define RI_HYSCR3_PE_2 (0x0004UL << RI_HYSCR3_PE_Pos) /*!< 0x00000004 */
6243 #define RI_HYSCR3_PE_3 (0x0008UL << RI_HYSCR3_PE_Pos) /*!< 0x00000008 */
6244 #define RI_HYSCR3_PE_4 (0x0010UL << RI_HYSCR3_PE_Pos) /*!< 0x00000010 */
6245 #define RI_HYSCR3_PE_5 (0x0020UL << RI_HYSCR3_PE_Pos) /*!< 0x00000020 */
6246 #define RI_HYSCR3_PE_6 (0x0040UL << RI_HYSCR3_PE_Pos) /*!< 0x00000040 */
6247 #define RI_HYSCR3_PE_7 (0x0080UL << RI_HYSCR3_PE_Pos) /*!< 0x00000080 */
[all …]
Dstm32l152xca.h6322 #define RI_HYSCR3_PE_Pos (0U) macro
6323 #define RI_HYSCR3_PE_Msk (0xFFFFUL << RI_HYSCR3_PE_Pos) /*!< 0x0000FFFF */
6325 #define RI_HYSCR3_PE_0 (0x0001UL << RI_HYSCR3_PE_Pos) /*!< 0x00000001 */
6326 #define RI_HYSCR3_PE_1 (0x0002UL << RI_HYSCR3_PE_Pos) /*!< 0x00000002 */
6327 #define RI_HYSCR3_PE_2 (0x0004UL << RI_HYSCR3_PE_Pos) /*!< 0x00000004 */
6328 #define RI_HYSCR3_PE_3 (0x0008UL << RI_HYSCR3_PE_Pos) /*!< 0x00000008 */
6329 #define RI_HYSCR3_PE_4 (0x0010UL << RI_HYSCR3_PE_Pos) /*!< 0x00000010 */
6330 #define RI_HYSCR3_PE_5 (0x0020UL << RI_HYSCR3_PE_Pos) /*!< 0x00000020 */
6331 #define RI_HYSCR3_PE_6 (0x0040UL << RI_HYSCR3_PE_Pos) /*!< 0x00000040 */
6332 #define RI_HYSCR3_PE_7 (0x0080UL << RI_HYSCR3_PE_Pos) /*!< 0x00000080 */
[all …]
Dstm32l152xdx.h6387 #define RI_HYSCR3_PE_Pos (0U) macro
6388 #define RI_HYSCR3_PE_Msk (0xFFFFUL << RI_HYSCR3_PE_Pos) /*!< 0x0000FFFF */
6390 #define RI_HYSCR3_PE_0 (0x0001UL << RI_HYSCR3_PE_Pos) /*!< 0x00000001 */
6391 #define RI_HYSCR3_PE_1 (0x0002UL << RI_HYSCR3_PE_Pos) /*!< 0x00000002 */
6392 #define RI_HYSCR3_PE_2 (0x0004UL << RI_HYSCR3_PE_Pos) /*!< 0x00000004 */
6393 #define RI_HYSCR3_PE_3 (0x0008UL << RI_HYSCR3_PE_Pos) /*!< 0x00000008 */
6394 #define RI_HYSCR3_PE_4 (0x0010UL << RI_HYSCR3_PE_Pos) /*!< 0x00000010 */
6395 #define RI_HYSCR3_PE_5 (0x0020UL << RI_HYSCR3_PE_Pos) /*!< 0x00000020 */
6396 #define RI_HYSCR3_PE_6 (0x0040UL << RI_HYSCR3_PE_Pos) /*!< 0x00000040 */
6397 #define RI_HYSCR3_PE_7 (0x0080UL << RI_HYSCR3_PE_Pos) /*!< 0x00000080 */
[all …]
Dstm32l152xe.h6387 #define RI_HYSCR3_PE_Pos (0U) macro
6388 #define RI_HYSCR3_PE_Msk (0xFFFFUL << RI_HYSCR3_PE_Pos) /*!< 0x0000FFFF */
6390 #define RI_HYSCR3_PE_0 (0x0001UL << RI_HYSCR3_PE_Pos) /*!< 0x00000001 */
6391 #define RI_HYSCR3_PE_1 (0x0002UL << RI_HYSCR3_PE_Pos) /*!< 0x00000002 */
6392 #define RI_HYSCR3_PE_2 (0x0004UL << RI_HYSCR3_PE_Pos) /*!< 0x00000004 */
6393 #define RI_HYSCR3_PE_3 (0x0008UL << RI_HYSCR3_PE_Pos) /*!< 0x00000008 */
6394 #define RI_HYSCR3_PE_4 (0x0010UL << RI_HYSCR3_PE_Pos) /*!< 0x00000010 */
6395 #define RI_HYSCR3_PE_5 (0x0020UL << RI_HYSCR3_PE_Pos) /*!< 0x00000020 */
6396 #define RI_HYSCR3_PE_6 (0x0040UL << RI_HYSCR3_PE_Pos) /*!< 0x00000040 */
6397 #define RI_HYSCR3_PE_7 (0x0080UL << RI_HYSCR3_PE_Pos) /*!< 0x00000080 */
[all …]
Dstm32l162xc.h6376 #define RI_HYSCR3_PE_Pos (0U) macro
6377 #define RI_HYSCR3_PE_Msk (0xFFFFUL << RI_HYSCR3_PE_Pos) /*!< 0x0000FFFF */
6379 #define RI_HYSCR3_PE_0 (0x0001UL << RI_HYSCR3_PE_Pos) /*!< 0x00000001 */
6380 #define RI_HYSCR3_PE_1 (0x0002UL << RI_HYSCR3_PE_Pos) /*!< 0x00000002 */
6381 #define RI_HYSCR3_PE_2 (0x0004UL << RI_HYSCR3_PE_Pos) /*!< 0x00000004 */
6382 #define RI_HYSCR3_PE_3 (0x0008UL << RI_HYSCR3_PE_Pos) /*!< 0x00000008 */
6383 #define RI_HYSCR3_PE_4 (0x0010UL << RI_HYSCR3_PE_Pos) /*!< 0x00000010 */
6384 #define RI_HYSCR3_PE_5 (0x0020UL << RI_HYSCR3_PE_Pos) /*!< 0x00000020 */
6385 #define RI_HYSCR3_PE_6 (0x0040UL << RI_HYSCR3_PE_Pos) /*!< 0x00000040 */
6386 #define RI_HYSCR3_PE_7 (0x0080UL << RI_HYSCR3_PE_Pos) /*!< 0x00000080 */
[all …]
Dstm32l162xca.h6461 #define RI_HYSCR3_PE_Pos (0U) macro
6462 #define RI_HYSCR3_PE_Msk (0xFFFFUL << RI_HYSCR3_PE_Pos) /*!< 0x0000FFFF */
6464 #define RI_HYSCR3_PE_0 (0x0001UL << RI_HYSCR3_PE_Pos) /*!< 0x00000001 */
6465 #define RI_HYSCR3_PE_1 (0x0002UL << RI_HYSCR3_PE_Pos) /*!< 0x00000002 */
6466 #define RI_HYSCR3_PE_2 (0x0004UL << RI_HYSCR3_PE_Pos) /*!< 0x00000004 */
6467 #define RI_HYSCR3_PE_3 (0x0008UL << RI_HYSCR3_PE_Pos) /*!< 0x00000008 */
6468 #define RI_HYSCR3_PE_4 (0x0010UL << RI_HYSCR3_PE_Pos) /*!< 0x00000010 */
6469 #define RI_HYSCR3_PE_5 (0x0020UL << RI_HYSCR3_PE_Pos) /*!< 0x00000020 */
6470 #define RI_HYSCR3_PE_6 (0x0040UL << RI_HYSCR3_PE_Pos) /*!< 0x00000040 */
6471 #define RI_HYSCR3_PE_7 (0x0080UL << RI_HYSCR3_PE_Pos) /*!< 0x00000080 */
[all …]
Dstm32l162xdx.h6526 #define RI_HYSCR3_PE_Pos (0U) macro
6527 #define RI_HYSCR3_PE_Msk (0xFFFFUL << RI_HYSCR3_PE_Pos) /*!< 0x0000FFFF */
6529 #define RI_HYSCR3_PE_0 (0x0001UL << RI_HYSCR3_PE_Pos) /*!< 0x00000001 */
6530 #define RI_HYSCR3_PE_1 (0x0002UL << RI_HYSCR3_PE_Pos) /*!< 0x00000002 */
6531 #define RI_HYSCR3_PE_2 (0x0004UL << RI_HYSCR3_PE_Pos) /*!< 0x00000004 */
6532 #define RI_HYSCR3_PE_3 (0x0008UL << RI_HYSCR3_PE_Pos) /*!< 0x00000008 */
6533 #define RI_HYSCR3_PE_4 (0x0010UL << RI_HYSCR3_PE_Pos) /*!< 0x00000010 */
6534 #define RI_HYSCR3_PE_5 (0x0020UL << RI_HYSCR3_PE_Pos) /*!< 0x00000020 */
6535 #define RI_HYSCR3_PE_6 (0x0040UL << RI_HYSCR3_PE_Pos) /*!< 0x00000040 */
6536 #define RI_HYSCR3_PE_7 (0x0080UL << RI_HYSCR3_PE_Pos) /*!< 0x00000080 */
[all …]
Dstm32l162xe.h6526 #define RI_HYSCR3_PE_Pos (0U) macro
6527 #define RI_HYSCR3_PE_Msk (0xFFFFUL << RI_HYSCR3_PE_Pos) /*!< 0x0000FFFF */
6529 #define RI_HYSCR3_PE_0 (0x0001UL << RI_HYSCR3_PE_Pos) /*!< 0x00000001 */
6530 #define RI_HYSCR3_PE_1 (0x0002UL << RI_HYSCR3_PE_Pos) /*!< 0x00000002 */
6531 #define RI_HYSCR3_PE_2 (0x0004UL << RI_HYSCR3_PE_Pos) /*!< 0x00000004 */
6532 #define RI_HYSCR3_PE_3 (0x0008UL << RI_HYSCR3_PE_Pos) /*!< 0x00000008 */
6533 #define RI_HYSCR3_PE_4 (0x0010UL << RI_HYSCR3_PE_Pos) /*!< 0x00000010 */
6534 #define RI_HYSCR3_PE_5 (0x0020UL << RI_HYSCR3_PE_Pos) /*!< 0x00000020 */
6535 #define RI_HYSCR3_PE_6 (0x0040UL << RI_HYSCR3_PE_Pos) /*!< 0x00000040 */
6536 #define RI_HYSCR3_PE_7 (0x0080UL << RI_HYSCR3_PE_Pos) /*!< 0x00000080 */
[all …]
Dstm32l151xd.h6872 #define RI_HYSCR3_PE_Pos (0U) macro
6873 #define RI_HYSCR3_PE_Msk (0xFFFFUL << RI_HYSCR3_PE_Pos) /*!< 0x0000FFFF */
6875 #define RI_HYSCR3_PE_0 (0x0001UL << RI_HYSCR3_PE_Pos) /*!< 0x00000001 */
6876 #define RI_HYSCR3_PE_1 (0x0002UL << RI_HYSCR3_PE_Pos) /*!< 0x00000002 */
6877 #define RI_HYSCR3_PE_2 (0x0004UL << RI_HYSCR3_PE_Pos) /*!< 0x00000004 */
6878 #define RI_HYSCR3_PE_3 (0x0008UL << RI_HYSCR3_PE_Pos) /*!< 0x00000008 */
6879 #define RI_HYSCR3_PE_4 (0x0010UL << RI_HYSCR3_PE_Pos) /*!< 0x00000010 */
6880 #define RI_HYSCR3_PE_5 (0x0020UL << RI_HYSCR3_PE_Pos) /*!< 0x00000020 */
6881 #define RI_HYSCR3_PE_6 (0x0040UL << RI_HYSCR3_PE_Pos) /*!< 0x00000040 */
6882 #define RI_HYSCR3_PE_7 (0x0080UL << RI_HYSCR3_PE_Pos) /*!< 0x00000080 */
[all …]
Dstm32l152xd.h7022 #define RI_HYSCR3_PE_Pos (0U) macro
7023 #define RI_HYSCR3_PE_Msk (0xFFFFUL << RI_HYSCR3_PE_Pos) /*!< 0x0000FFFF */
7025 #define RI_HYSCR3_PE_0 (0x0001UL << RI_HYSCR3_PE_Pos) /*!< 0x00000001 */
7026 #define RI_HYSCR3_PE_1 (0x0002UL << RI_HYSCR3_PE_Pos) /*!< 0x00000002 */
7027 #define RI_HYSCR3_PE_2 (0x0004UL << RI_HYSCR3_PE_Pos) /*!< 0x00000004 */
7028 #define RI_HYSCR3_PE_3 (0x0008UL << RI_HYSCR3_PE_Pos) /*!< 0x00000008 */
7029 #define RI_HYSCR3_PE_4 (0x0010UL << RI_HYSCR3_PE_Pos) /*!< 0x00000010 */
7030 #define RI_HYSCR3_PE_5 (0x0020UL << RI_HYSCR3_PE_Pos) /*!< 0x00000020 */
7031 #define RI_HYSCR3_PE_6 (0x0040UL << RI_HYSCR3_PE_Pos) /*!< 0x00000040 */
7032 #define RI_HYSCR3_PE_7 (0x0080UL << RI_HYSCR3_PE_Pos) /*!< 0x00000080 */
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Dstm32l162xd.h7161 #define RI_HYSCR3_PE_Pos (0U) macro
7162 #define RI_HYSCR3_PE_Msk (0xFFFFUL << RI_HYSCR3_PE_Pos) /*!< 0x0000FFFF */
7164 #define RI_HYSCR3_PE_0 (0x0001UL << RI_HYSCR3_PE_Pos) /*!< 0x00000001 */
7165 #define RI_HYSCR3_PE_1 (0x0002UL << RI_HYSCR3_PE_Pos) /*!< 0x00000002 */
7166 #define RI_HYSCR3_PE_2 (0x0004UL << RI_HYSCR3_PE_Pos) /*!< 0x00000004 */
7167 #define RI_HYSCR3_PE_3 (0x0008UL << RI_HYSCR3_PE_Pos) /*!< 0x00000008 */
7168 #define RI_HYSCR3_PE_4 (0x0010UL << RI_HYSCR3_PE_Pos) /*!< 0x00000010 */
7169 #define RI_HYSCR3_PE_5 (0x0020UL << RI_HYSCR3_PE_Pos) /*!< 0x00000020 */
7170 #define RI_HYSCR3_PE_6 (0x0040UL << RI_HYSCR3_PE_Pos) /*!< 0x00000040 */
7171 #define RI_HYSCR3_PE_7 (0x0080UL << RI_HYSCR3_PE_Pos) /*!< 0x00000080 */
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