Home
last modified time | relevance | path

Searched refs:RI_HYSCR2_PC_Pos (Results 1 – 22 of 22) sorted by relevance

/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dstm32l152xb.h5617 #define RI_HYSCR2_PC_Pos (0U) macro
5618 #define RI_HYSCR2_PC_Msk (0xFFFFUL << RI_HYSCR2_PC_Pos) /*!< 0x0000FFFF */
5620 #define RI_HYSCR2_PC_0 (0x0001UL << RI_HYSCR2_PC_Pos) /*!< 0x00000001 */
5621 #define RI_HYSCR2_PC_1 (0x0002UL << RI_HYSCR2_PC_Pos) /*!< 0x00000002 */
5622 #define RI_HYSCR2_PC_2 (0x0004UL << RI_HYSCR2_PC_Pos) /*!< 0x00000004 */
5623 #define RI_HYSCR2_PC_3 (0x0008UL << RI_HYSCR2_PC_Pos) /*!< 0x00000008 */
5624 #define RI_HYSCR2_PC_4 (0x0010UL << RI_HYSCR2_PC_Pos) /*!< 0x00000010 */
5625 #define RI_HYSCR2_PC_5 (0x0020UL << RI_HYSCR2_PC_Pos) /*!< 0x00000020 */
5626 #define RI_HYSCR2_PC_6 (0x0040UL << RI_HYSCR2_PC_Pos) /*!< 0x00000040 */
5627 #define RI_HYSCR2_PC_7 (0x0080UL << RI_HYSCR2_PC_Pos) /*!< 0x00000080 */
[all …]
Dstm32l152xba.h5678 #define RI_HYSCR2_PC_Pos (0U) macro
5679 #define RI_HYSCR2_PC_Msk (0xFFFFUL << RI_HYSCR2_PC_Pos) /*!< 0x0000FFFF */
5681 #define RI_HYSCR2_PC_0 (0x0001UL << RI_HYSCR2_PC_Pos) /*!< 0x00000001 */
5682 #define RI_HYSCR2_PC_1 (0x0002UL << RI_HYSCR2_PC_Pos) /*!< 0x00000002 */
5683 #define RI_HYSCR2_PC_2 (0x0004UL << RI_HYSCR2_PC_Pos) /*!< 0x00000004 */
5684 #define RI_HYSCR2_PC_3 (0x0008UL << RI_HYSCR2_PC_Pos) /*!< 0x00000008 */
5685 #define RI_HYSCR2_PC_4 (0x0010UL << RI_HYSCR2_PC_Pos) /*!< 0x00000010 */
5686 #define RI_HYSCR2_PC_5 (0x0020UL << RI_HYSCR2_PC_Pos) /*!< 0x00000020 */
5687 #define RI_HYSCR2_PC_6 (0x0040UL << RI_HYSCR2_PC_Pos) /*!< 0x00000040 */
5688 #define RI_HYSCR2_PC_7 (0x0080UL << RI_HYSCR2_PC_Pos) /*!< 0x00000080 */
[all …]
Dstm32l100xba.h5663 #define RI_HYSCR2_PC_Pos (0U) macro
5664 #define RI_HYSCR2_PC_Msk (0xFFFFUL << RI_HYSCR2_PC_Pos) /*!< 0x0000FFFF */
5666 #define RI_HYSCR2_PC_0 (0x0001UL << RI_HYSCR2_PC_Pos) /*!< 0x00000001 */
5667 #define RI_HYSCR2_PC_1 (0x0002UL << RI_HYSCR2_PC_Pos) /*!< 0x00000002 */
5668 #define RI_HYSCR2_PC_2 (0x0004UL << RI_HYSCR2_PC_Pos) /*!< 0x00000004 */
5669 #define RI_HYSCR2_PC_3 (0x0008UL << RI_HYSCR2_PC_Pos) /*!< 0x00000008 */
5670 #define RI_HYSCR2_PC_4 (0x0010UL << RI_HYSCR2_PC_Pos) /*!< 0x00000010 */
5671 #define RI_HYSCR2_PC_5 (0x0020UL << RI_HYSCR2_PC_Pos) /*!< 0x00000020 */
5672 #define RI_HYSCR2_PC_6 (0x0040UL << RI_HYSCR2_PC_Pos) /*!< 0x00000040 */
5673 #define RI_HYSCR2_PC_7 (0x0080UL << RI_HYSCR2_PC_Pos) /*!< 0x00000080 */
[all …]
Dstm32l100xb.h5515 #define RI_HYSCR2_PC_Pos (0U) macro
5516 #define RI_HYSCR2_PC_Msk (0xFFFFUL << RI_HYSCR2_PC_Pos) /*!< 0x0000FFFF */
5518 #define RI_HYSCR2_PC_0 (0x0001UL << RI_HYSCR2_PC_Pos) /*!< 0x00000001 */
5519 #define RI_HYSCR2_PC_1 (0x0002UL << RI_HYSCR2_PC_Pos) /*!< 0x00000002 */
5520 #define RI_HYSCR2_PC_2 (0x0004UL << RI_HYSCR2_PC_Pos) /*!< 0x00000004 */
5521 #define RI_HYSCR2_PC_3 (0x0008UL << RI_HYSCR2_PC_Pos) /*!< 0x00000008 */
5522 #define RI_HYSCR2_PC_4 (0x0010UL << RI_HYSCR2_PC_Pos) /*!< 0x00000010 */
5523 #define RI_HYSCR2_PC_5 (0x0020UL << RI_HYSCR2_PC_Pos) /*!< 0x00000020 */
5524 #define RI_HYSCR2_PC_6 (0x0040UL << RI_HYSCR2_PC_Pos) /*!< 0x00000040 */
5525 #define RI_HYSCR2_PC_7 (0x0080UL << RI_HYSCR2_PC_Pos) /*!< 0x00000080 */
[all …]
Dstm32l151xb.h5467 #define RI_HYSCR2_PC_Pos (0U) macro
5468 #define RI_HYSCR2_PC_Msk (0xFFFFUL << RI_HYSCR2_PC_Pos) /*!< 0x0000FFFF */
5470 #define RI_HYSCR2_PC_0 (0x0001UL << RI_HYSCR2_PC_Pos) /*!< 0x00000001 */
5471 #define RI_HYSCR2_PC_1 (0x0002UL << RI_HYSCR2_PC_Pos) /*!< 0x00000002 */
5472 #define RI_HYSCR2_PC_2 (0x0004UL << RI_HYSCR2_PC_Pos) /*!< 0x00000004 */
5473 #define RI_HYSCR2_PC_3 (0x0008UL << RI_HYSCR2_PC_Pos) /*!< 0x00000008 */
5474 #define RI_HYSCR2_PC_4 (0x0010UL << RI_HYSCR2_PC_Pos) /*!< 0x00000010 */
5475 #define RI_HYSCR2_PC_5 (0x0020UL << RI_HYSCR2_PC_Pos) /*!< 0x00000020 */
5476 #define RI_HYSCR2_PC_6 (0x0040UL << RI_HYSCR2_PC_Pos) /*!< 0x00000040 */
5477 #define RI_HYSCR2_PC_7 (0x0080UL << RI_HYSCR2_PC_Pos) /*!< 0x00000080 */
[all …]
Dstm32l151xba.h5543 #define RI_HYSCR2_PC_Pos (0U) macro
5544 #define RI_HYSCR2_PC_Msk (0xFFFFUL << RI_HYSCR2_PC_Pos) /*!< 0x0000FFFF */
5546 #define RI_HYSCR2_PC_0 (0x0001UL << RI_HYSCR2_PC_Pos) /*!< 0x00000001 */
5547 #define RI_HYSCR2_PC_1 (0x0002UL << RI_HYSCR2_PC_Pos) /*!< 0x00000002 */
5548 #define RI_HYSCR2_PC_2 (0x0004UL << RI_HYSCR2_PC_Pos) /*!< 0x00000004 */
5549 #define RI_HYSCR2_PC_3 (0x0008UL << RI_HYSCR2_PC_Pos) /*!< 0x00000008 */
5550 #define RI_HYSCR2_PC_4 (0x0010UL << RI_HYSCR2_PC_Pos) /*!< 0x00000010 */
5551 #define RI_HYSCR2_PC_5 (0x0020UL << RI_HYSCR2_PC_Pos) /*!< 0x00000020 */
5552 #define RI_HYSCR2_PC_6 (0x0040UL << RI_HYSCR2_PC_Pos) /*!< 0x00000040 */
5553 #define RI_HYSCR2_PC_7 (0x0080UL << RI_HYSCR2_PC_Pos) /*!< 0x00000080 */
[all …]
Dstm32l100xc.h5878 #define RI_HYSCR2_PC_Pos (0U) macro
5879 #define RI_HYSCR2_PC_Msk (0xFFFFUL << RI_HYSCR2_PC_Pos) /*!< 0x0000FFFF */
5881 #define RI_HYSCR2_PC_0 (0x0001UL << RI_HYSCR2_PC_Pos) /*!< 0x00000001 */
5882 #define RI_HYSCR2_PC_1 (0x0002UL << RI_HYSCR2_PC_Pos) /*!< 0x00000002 */
5883 #define RI_HYSCR2_PC_2 (0x0004UL << RI_HYSCR2_PC_Pos) /*!< 0x00000004 */
5884 #define RI_HYSCR2_PC_3 (0x0008UL << RI_HYSCR2_PC_Pos) /*!< 0x00000008 */
5885 #define RI_HYSCR2_PC_4 (0x0010UL << RI_HYSCR2_PC_Pos) /*!< 0x00000010 */
5886 #define RI_HYSCR2_PC_5 (0x0020UL << RI_HYSCR2_PC_Pos) /*!< 0x00000020 */
5887 #define RI_HYSCR2_PC_6 (0x0040UL << RI_HYSCR2_PC_Pos) /*!< 0x00000040 */
5888 #define RI_HYSCR2_PC_7 (0x0080UL << RI_HYSCR2_PC_Pos) /*!< 0x00000080 */
[all …]
Dstm32l151xc.h6067 #define RI_HYSCR2_PC_Pos (0U) macro
6068 #define RI_HYSCR2_PC_Msk (0xFFFFUL << RI_HYSCR2_PC_Pos) /*!< 0x0000FFFF */
6070 #define RI_HYSCR2_PC_0 (0x0001UL << RI_HYSCR2_PC_Pos) /*!< 0x00000001 */
6071 #define RI_HYSCR2_PC_1 (0x0002UL << RI_HYSCR2_PC_Pos) /*!< 0x00000002 */
6072 #define RI_HYSCR2_PC_2 (0x0004UL << RI_HYSCR2_PC_Pos) /*!< 0x00000004 */
6073 #define RI_HYSCR2_PC_3 (0x0008UL << RI_HYSCR2_PC_Pos) /*!< 0x00000008 */
6074 #define RI_HYSCR2_PC_4 (0x0010UL << RI_HYSCR2_PC_Pos) /*!< 0x00000010 */
6075 #define RI_HYSCR2_PC_5 (0x0020UL << RI_HYSCR2_PC_Pos) /*!< 0x00000020 */
6076 #define RI_HYSCR2_PC_6 (0x0040UL << RI_HYSCR2_PC_Pos) /*!< 0x00000040 */
6077 #define RI_HYSCR2_PC_7 (0x0080UL << RI_HYSCR2_PC_Pos) /*!< 0x00000080 */
[all …]
Dstm32l151xca.h6131 #define RI_HYSCR2_PC_Pos (0U) macro
6132 #define RI_HYSCR2_PC_Msk (0xFFFFUL << RI_HYSCR2_PC_Pos) /*!< 0x0000FFFF */
6134 #define RI_HYSCR2_PC_0 (0x0001UL << RI_HYSCR2_PC_Pos) /*!< 0x00000001 */
6135 #define RI_HYSCR2_PC_1 (0x0002UL << RI_HYSCR2_PC_Pos) /*!< 0x00000002 */
6136 #define RI_HYSCR2_PC_2 (0x0004UL << RI_HYSCR2_PC_Pos) /*!< 0x00000004 */
6137 #define RI_HYSCR2_PC_3 (0x0008UL << RI_HYSCR2_PC_Pos) /*!< 0x00000008 */
6138 #define RI_HYSCR2_PC_4 (0x0010UL << RI_HYSCR2_PC_Pos) /*!< 0x00000010 */
6139 #define RI_HYSCR2_PC_5 (0x0020UL << RI_HYSCR2_PC_Pos) /*!< 0x00000020 */
6140 #define RI_HYSCR2_PC_6 (0x0040UL << RI_HYSCR2_PC_Pos) /*!< 0x00000040 */
6141 #define RI_HYSCR2_PC_7 (0x0080UL << RI_HYSCR2_PC_Pos) /*!< 0x00000080 */
[all …]
Dstm32l151xdx.h6196 #define RI_HYSCR2_PC_Pos (0U) macro
6197 #define RI_HYSCR2_PC_Msk (0xFFFFUL << RI_HYSCR2_PC_Pos) /*!< 0x0000FFFF */
6199 #define RI_HYSCR2_PC_0 (0x0001UL << RI_HYSCR2_PC_Pos) /*!< 0x00000001 */
6200 #define RI_HYSCR2_PC_1 (0x0002UL << RI_HYSCR2_PC_Pos) /*!< 0x00000002 */
6201 #define RI_HYSCR2_PC_2 (0x0004UL << RI_HYSCR2_PC_Pos) /*!< 0x00000004 */
6202 #define RI_HYSCR2_PC_3 (0x0008UL << RI_HYSCR2_PC_Pos) /*!< 0x00000008 */
6203 #define RI_HYSCR2_PC_4 (0x0010UL << RI_HYSCR2_PC_Pos) /*!< 0x00000010 */
6204 #define RI_HYSCR2_PC_5 (0x0020UL << RI_HYSCR2_PC_Pos) /*!< 0x00000020 */
6205 #define RI_HYSCR2_PC_6 (0x0040UL << RI_HYSCR2_PC_Pos) /*!< 0x00000040 */
6206 #define RI_HYSCR2_PC_7 (0x0080UL << RI_HYSCR2_PC_Pos) /*!< 0x00000080 */
[all …]
Dstm32l151xe.h6196 #define RI_HYSCR2_PC_Pos (0U) macro
6197 #define RI_HYSCR2_PC_Msk (0xFFFFUL << RI_HYSCR2_PC_Pos) /*!< 0x0000FFFF */
6199 #define RI_HYSCR2_PC_0 (0x0001UL << RI_HYSCR2_PC_Pos) /*!< 0x00000001 */
6200 #define RI_HYSCR2_PC_1 (0x0002UL << RI_HYSCR2_PC_Pos) /*!< 0x00000002 */
6201 #define RI_HYSCR2_PC_2 (0x0004UL << RI_HYSCR2_PC_Pos) /*!< 0x00000004 */
6202 #define RI_HYSCR2_PC_3 (0x0008UL << RI_HYSCR2_PC_Pos) /*!< 0x00000008 */
6203 #define RI_HYSCR2_PC_4 (0x0010UL << RI_HYSCR2_PC_Pos) /*!< 0x00000010 */
6204 #define RI_HYSCR2_PC_5 (0x0020UL << RI_HYSCR2_PC_Pos) /*!< 0x00000020 */
6205 #define RI_HYSCR2_PC_6 (0x0040UL << RI_HYSCR2_PC_Pos) /*!< 0x00000040 */
6206 #define RI_HYSCR2_PC_7 (0x0080UL << RI_HYSCR2_PC_Pos) /*!< 0x00000080 */
[all …]
Dstm32l152xc.h6196 #define RI_HYSCR2_PC_Pos (0U) macro
6197 #define RI_HYSCR2_PC_Msk (0xFFFFUL << RI_HYSCR2_PC_Pos) /*!< 0x0000FFFF */
6199 #define RI_HYSCR2_PC_0 (0x0001UL << RI_HYSCR2_PC_Pos) /*!< 0x00000001 */
6200 #define RI_HYSCR2_PC_1 (0x0002UL << RI_HYSCR2_PC_Pos) /*!< 0x00000002 */
6201 #define RI_HYSCR2_PC_2 (0x0004UL << RI_HYSCR2_PC_Pos) /*!< 0x00000004 */
6202 #define RI_HYSCR2_PC_3 (0x0008UL << RI_HYSCR2_PC_Pos) /*!< 0x00000008 */
6203 #define RI_HYSCR2_PC_4 (0x0010UL << RI_HYSCR2_PC_Pos) /*!< 0x00000010 */
6204 #define RI_HYSCR2_PC_5 (0x0020UL << RI_HYSCR2_PC_Pos) /*!< 0x00000020 */
6205 #define RI_HYSCR2_PC_6 (0x0040UL << RI_HYSCR2_PC_Pos) /*!< 0x00000040 */
6206 #define RI_HYSCR2_PC_7 (0x0080UL << RI_HYSCR2_PC_Pos) /*!< 0x00000080 */
[all …]
Dstm32l152xca.h6281 #define RI_HYSCR2_PC_Pos (0U) macro
6282 #define RI_HYSCR2_PC_Msk (0xFFFFUL << RI_HYSCR2_PC_Pos) /*!< 0x0000FFFF */
6284 #define RI_HYSCR2_PC_0 (0x0001UL << RI_HYSCR2_PC_Pos) /*!< 0x00000001 */
6285 #define RI_HYSCR2_PC_1 (0x0002UL << RI_HYSCR2_PC_Pos) /*!< 0x00000002 */
6286 #define RI_HYSCR2_PC_2 (0x0004UL << RI_HYSCR2_PC_Pos) /*!< 0x00000004 */
6287 #define RI_HYSCR2_PC_3 (0x0008UL << RI_HYSCR2_PC_Pos) /*!< 0x00000008 */
6288 #define RI_HYSCR2_PC_4 (0x0010UL << RI_HYSCR2_PC_Pos) /*!< 0x00000010 */
6289 #define RI_HYSCR2_PC_5 (0x0020UL << RI_HYSCR2_PC_Pos) /*!< 0x00000020 */
6290 #define RI_HYSCR2_PC_6 (0x0040UL << RI_HYSCR2_PC_Pos) /*!< 0x00000040 */
6291 #define RI_HYSCR2_PC_7 (0x0080UL << RI_HYSCR2_PC_Pos) /*!< 0x00000080 */
[all …]
Dstm32l152xdx.h6346 #define RI_HYSCR2_PC_Pos (0U) macro
6347 #define RI_HYSCR2_PC_Msk (0xFFFFUL << RI_HYSCR2_PC_Pos) /*!< 0x0000FFFF */
6349 #define RI_HYSCR2_PC_0 (0x0001UL << RI_HYSCR2_PC_Pos) /*!< 0x00000001 */
6350 #define RI_HYSCR2_PC_1 (0x0002UL << RI_HYSCR2_PC_Pos) /*!< 0x00000002 */
6351 #define RI_HYSCR2_PC_2 (0x0004UL << RI_HYSCR2_PC_Pos) /*!< 0x00000004 */
6352 #define RI_HYSCR2_PC_3 (0x0008UL << RI_HYSCR2_PC_Pos) /*!< 0x00000008 */
6353 #define RI_HYSCR2_PC_4 (0x0010UL << RI_HYSCR2_PC_Pos) /*!< 0x00000010 */
6354 #define RI_HYSCR2_PC_5 (0x0020UL << RI_HYSCR2_PC_Pos) /*!< 0x00000020 */
6355 #define RI_HYSCR2_PC_6 (0x0040UL << RI_HYSCR2_PC_Pos) /*!< 0x00000040 */
6356 #define RI_HYSCR2_PC_7 (0x0080UL << RI_HYSCR2_PC_Pos) /*!< 0x00000080 */
[all …]
Dstm32l152xe.h6346 #define RI_HYSCR2_PC_Pos (0U) macro
6347 #define RI_HYSCR2_PC_Msk (0xFFFFUL << RI_HYSCR2_PC_Pos) /*!< 0x0000FFFF */
6349 #define RI_HYSCR2_PC_0 (0x0001UL << RI_HYSCR2_PC_Pos) /*!< 0x00000001 */
6350 #define RI_HYSCR2_PC_1 (0x0002UL << RI_HYSCR2_PC_Pos) /*!< 0x00000002 */
6351 #define RI_HYSCR2_PC_2 (0x0004UL << RI_HYSCR2_PC_Pos) /*!< 0x00000004 */
6352 #define RI_HYSCR2_PC_3 (0x0008UL << RI_HYSCR2_PC_Pos) /*!< 0x00000008 */
6353 #define RI_HYSCR2_PC_4 (0x0010UL << RI_HYSCR2_PC_Pos) /*!< 0x00000010 */
6354 #define RI_HYSCR2_PC_5 (0x0020UL << RI_HYSCR2_PC_Pos) /*!< 0x00000020 */
6355 #define RI_HYSCR2_PC_6 (0x0040UL << RI_HYSCR2_PC_Pos) /*!< 0x00000040 */
6356 #define RI_HYSCR2_PC_7 (0x0080UL << RI_HYSCR2_PC_Pos) /*!< 0x00000080 */
[all …]
Dstm32l162xc.h6335 #define RI_HYSCR2_PC_Pos (0U) macro
6336 #define RI_HYSCR2_PC_Msk (0xFFFFUL << RI_HYSCR2_PC_Pos) /*!< 0x0000FFFF */
6338 #define RI_HYSCR2_PC_0 (0x0001UL << RI_HYSCR2_PC_Pos) /*!< 0x00000001 */
6339 #define RI_HYSCR2_PC_1 (0x0002UL << RI_HYSCR2_PC_Pos) /*!< 0x00000002 */
6340 #define RI_HYSCR2_PC_2 (0x0004UL << RI_HYSCR2_PC_Pos) /*!< 0x00000004 */
6341 #define RI_HYSCR2_PC_3 (0x0008UL << RI_HYSCR2_PC_Pos) /*!< 0x00000008 */
6342 #define RI_HYSCR2_PC_4 (0x0010UL << RI_HYSCR2_PC_Pos) /*!< 0x00000010 */
6343 #define RI_HYSCR2_PC_5 (0x0020UL << RI_HYSCR2_PC_Pos) /*!< 0x00000020 */
6344 #define RI_HYSCR2_PC_6 (0x0040UL << RI_HYSCR2_PC_Pos) /*!< 0x00000040 */
6345 #define RI_HYSCR2_PC_7 (0x0080UL << RI_HYSCR2_PC_Pos) /*!< 0x00000080 */
[all …]
Dstm32l162xca.h6420 #define RI_HYSCR2_PC_Pos (0U) macro
6421 #define RI_HYSCR2_PC_Msk (0xFFFFUL << RI_HYSCR2_PC_Pos) /*!< 0x0000FFFF */
6423 #define RI_HYSCR2_PC_0 (0x0001UL << RI_HYSCR2_PC_Pos) /*!< 0x00000001 */
6424 #define RI_HYSCR2_PC_1 (0x0002UL << RI_HYSCR2_PC_Pos) /*!< 0x00000002 */
6425 #define RI_HYSCR2_PC_2 (0x0004UL << RI_HYSCR2_PC_Pos) /*!< 0x00000004 */
6426 #define RI_HYSCR2_PC_3 (0x0008UL << RI_HYSCR2_PC_Pos) /*!< 0x00000008 */
6427 #define RI_HYSCR2_PC_4 (0x0010UL << RI_HYSCR2_PC_Pos) /*!< 0x00000010 */
6428 #define RI_HYSCR2_PC_5 (0x0020UL << RI_HYSCR2_PC_Pos) /*!< 0x00000020 */
6429 #define RI_HYSCR2_PC_6 (0x0040UL << RI_HYSCR2_PC_Pos) /*!< 0x00000040 */
6430 #define RI_HYSCR2_PC_7 (0x0080UL << RI_HYSCR2_PC_Pos) /*!< 0x00000080 */
[all …]
Dstm32l162xdx.h6485 #define RI_HYSCR2_PC_Pos (0U) macro
6486 #define RI_HYSCR2_PC_Msk (0xFFFFUL << RI_HYSCR2_PC_Pos) /*!< 0x0000FFFF */
6488 #define RI_HYSCR2_PC_0 (0x0001UL << RI_HYSCR2_PC_Pos) /*!< 0x00000001 */
6489 #define RI_HYSCR2_PC_1 (0x0002UL << RI_HYSCR2_PC_Pos) /*!< 0x00000002 */
6490 #define RI_HYSCR2_PC_2 (0x0004UL << RI_HYSCR2_PC_Pos) /*!< 0x00000004 */
6491 #define RI_HYSCR2_PC_3 (0x0008UL << RI_HYSCR2_PC_Pos) /*!< 0x00000008 */
6492 #define RI_HYSCR2_PC_4 (0x0010UL << RI_HYSCR2_PC_Pos) /*!< 0x00000010 */
6493 #define RI_HYSCR2_PC_5 (0x0020UL << RI_HYSCR2_PC_Pos) /*!< 0x00000020 */
6494 #define RI_HYSCR2_PC_6 (0x0040UL << RI_HYSCR2_PC_Pos) /*!< 0x00000040 */
6495 #define RI_HYSCR2_PC_7 (0x0080UL << RI_HYSCR2_PC_Pos) /*!< 0x00000080 */
[all …]
Dstm32l162xe.h6485 #define RI_HYSCR2_PC_Pos (0U) macro
6486 #define RI_HYSCR2_PC_Msk (0xFFFFUL << RI_HYSCR2_PC_Pos) /*!< 0x0000FFFF */
6488 #define RI_HYSCR2_PC_0 (0x0001UL << RI_HYSCR2_PC_Pos) /*!< 0x00000001 */
6489 #define RI_HYSCR2_PC_1 (0x0002UL << RI_HYSCR2_PC_Pos) /*!< 0x00000002 */
6490 #define RI_HYSCR2_PC_2 (0x0004UL << RI_HYSCR2_PC_Pos) /*!< 0x00000004 */
6491 #define RI_HYSCR2_PC_3 (0x0008UL << RI_HYSCR2_PC_Pos) /*!< 0x00000008 */
6492 #define RI_HYSCR2_PC_4 (0x0010UL << RI_HYSCR2_PC_Pos) /*!< 0x00000010 */
6493 #define RI_HYSCR2_PC_5 (0x0020UL << RI_HYSCR2_PC_Pos) /*!< 0x00000020 */
6494 #define RI_HYSCR2_PC_6 (0x0040UL << RI_HYSCR2_PC_Pos) /*!< 0x00000040 */
6495 #define RI_HYSCR2_PC_7 (0x0080UL << RI_HYSCR2_PC_Pos) /*!< 0x00000080 */
[all …]
Dstm32l151xd.h6831 #define RI_HYSCR2_PC_Pos (0U) macro
6832 #define RI_HYSCR2_PC_Msk (0xFFFFUL << RI_HYSCR2_PC_Pos) /*!< 0x0000FFFF */
6834 #define RI_HYSCR2_PC_0 (0x0001UL << RI_HYSCR2_PC_Pos) /*!< 0x00000001 */
6835 #define RI_HYSCR2_PC_1 (0x0002UL << RI_HYSCR2_PC_Pos) /*!< 0x00000002 */
6836 #define RI_HYSCR2_PC_2 (0x0004UL << RI_HYSCR2_PC_Pos) /*!< 0x00000004 */
6837 #define RI_HYSCR2_PC_3 (0x0008UL << RI_HYSCR2_PC_Pos) /*!< 0x00000008 */
6838 #define RI_HYSCR2_PC_4 (0x0010UL << RI_HYSCR2_PC_Pos) /*!< 0x00000010 */
6839 #define RI_HYSCR2_PC_5 (0x0020UL << RI_HYSCR2_PC_Pos) /*!< 0x00000020 */
6840 #define RI_HYSCR2_PC_6 (0x0040UL << RI_HYSCR2_PC_Pos) /*!< 0x00000040 */
6841 #define RI_HYSCR2_PC_7 (0x0080UL << RI_HYSCR2_PC_Pos) /*!< 0x00000080 */
[all …]
Dstm32l152xd.h6981 #define RI_HYSCR2_PC_Pos (0U) macro
6982 #define RI_HYSCR2_PC_Msk (0xFFFFUL << RI_HYSCR2_PC_Pos) /*!< 0x0000FFFF */
6984 #define RI_HYSCR2_PC_0 (0x0001UL << RI_HYSCR2_PC_Pos) /*!< 0x00000001 */
6985 #define RI_HYSCR2_PC_1 (0x0002UL << RI_HYSCR2_PC_Pos) /*!< 0x00000002 */
6986 #define RI_HYSCR2_PC_2 (0x0004UL << RI_HYSCR2_PC_Pos) /*!< 0x00000004 */
6987 #define RI_HYSCR2_PC_3 (0x0008UL << RI_HYSCR2_PC_Pos) /*!< 0x00000008 */
6988 #define RI_HYSCR2_PC_4 (0x0010UL << RI_HYSCR2_PC_Pos) /*!< 0x00000010 */
6989 #define RI_HYSCR2_PC_5 (0x0020UL << RI_HYSCR2_PC_Pos) /*!< 0x00000020 */
6990 #define RI_HYSCR2_PC_6 (0x0040UL << RI_HYSCR2_PC_Pos) /*!< 0x00000040 */
6991 #define RI_HYSCR2_PC_7 (0x0080UL << RI_HYSCR2_PC_Pos) /*!< 0x00000080 */
[all …]
Dstm32l162xd.h7120 #define RI_HYSCR2_PC_Pos (0U) macro
7121 #define RI_HYSCR2_PC_Msk (0xFFFFUL << RI_HYSCR2_PC_Pos) /*!< 0x0000FFFF */
7123 #define RI_HYSCR2_PC_0 (0x0001UL << RI_HYSCR2_PC_Pos) /*!< 0x00000001 */
7124 #define RI_HYSCR2_PC_1 (0x0002UL << RI_HYSCR2_PC_Pos) /*!< 0x00000002 */
7125 #define RI_HYSCR2_PC_2 (0x0004UL << RI_HYSCR2_PC_Pos) /*!< 0x00000004 */
7126 #define RI_HYSCR2_PC_3 (0x0008UL << RI_HYSCR2_PC_Pos) /*!< 0x00000008 */
7127 #define RI_HYSCR2_PC_4 (0x0010UL << RI_HYSCR2_PC_Pos) /*!< 0x00000010 */
7128 #define RI_HYSCR2_PC_5 (0x0020UL << RI_HYSCR2_PC_Pos) /*!< 0x00000020 */
7129 #define RI_HYSCR2_PC_6 (0x0040UL << RI_HYSCR2_PC_Pos) /*!< 0x00000040 */
7130 #define RI_HYSCR2_PC_7 (0x0080UL << RI_HYSCR2_PC_Pos) /*!< 0x00000080 */
[all …]