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Searched refs:RCC_ICSCR_MSICAL_Pos (Results 1 – 25 of 91) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h4953 #define RCC_ICSCR_MSICAL_Pos (0U) macro
4954 #define RCC_ICSCR_MSICAL_Msk (0xFFUL << RCC_ICSCR_MSICAL_Pos) /*!< 0x000000FF */
4956 #define RCC_ICSCR_MSICAL_0 (0x01UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000001 */
4957 #define RCC_ICSCR_MSICAL_1 (0x02UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000002 */
4958 #define RCC_ICSCR_MSICAL_2 (0x04UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000004 */
4959 #define RCC_ICSCR_MSICAL_3 (0x08UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000008 */
4960 #define RCC_ICSCR_MSICAL_4 (0x10UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000010 */
4961 #define RCC_ICSCR_MSICAL_5 (0x20UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000020 */
4962 #define RCC_ICSCR_MSICAL_6 (0x40UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000040 */
4963 #define RCC_ICSCR_MSICAL_7 (0x80UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000080 */
Dstm32u083xx.h5718 #define RCC_ICSCR_MSICAL_Pos (0U) macro
5719 #define RCC_ICSCR_MSICAL_Msk (0xFFUL << RCC_ICSCR_MSICAL_Pos) /*!< 0x000000FF */
5721 #define RCC_ICSCR_MSICAL_0 (0x01UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000001 */
5722 #define RCC_ICSCR_MSICAL_1 (0x02UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000002 */
5723 #define RCC_ICSCR_MSICAL_2 (0x04UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000004 */
5724 #define RCC_ICSCR_MSICAL_3 (0x08UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000008 */
5725 #define RCC_ICSCR_MSICAL_4 (0x10UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000010 */
5726 #define RCC_ICSCR_MSICAL_5 (0x20UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000020 */
5727 #define RCC_ICSCR_MSICAL_6 (0x40UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000040 */
5728 #define RCC_ICSCR_MSICAL_7 (0x80UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000080 */
Dstm32u073xx.h5460 #define RCC_ICSCR_MSICAL_Pos (0U) macro
5461 #define RCC_ICSCR_MSICAL_Msk (0xFFUL << RCC_ICSCR_MSICAL_Pos) /*!< 0x000000FF */
5463 #define RCC_ICSCR_MSICAL_0 (0x01UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000001 */
5464 #define RCC_ICSCR_MSICAL_1 (0x02UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000002 */
5465 #define RCC_ICSCR_MSICAL_2 (0x04UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000004 */
5466 #define RCC_ICSCR_MSICAL_3 (0x08UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000008 */
5467 #define RCC_ICSCR_MSICAL_4 (0x10UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000010 */
5468 #define RCC_ICSCR_MSICAL_5 (0x20UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000020 */
5469 #define RCC_ICSCR_MSICAL_6 (0x40UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000040 */
5470 #define RCC_ICSCR_MSICAL_7 (0x80UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000080 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb50xx.h6378 #define RCC_ICSCR_MSICAL_Pos (0U) macro
6379 #define RCC_ICSCR_MSICAL_Msk (0xFFUL << RCC_ICSCR_MSICAL_Pos) /*!< 0x000000FF */
6381 #define RCC_ICSCR_MSICAL_0 (0x01U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000001 */
6382 #define RCC_ICSCR_MSICAL_1 (0x02U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000002 */
6383 #define RCC_ICSCR_MSICAL_2 (0x04U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000004 */
6384 #define RCC_ICSCR_MSICAL_3 (0x08U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000008 */
6385 #define RCC_ICSCR_MSICAL_4 (0x10U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000010 */
6386 #define RCC_ICSCR_MSICAL_5 (0x20U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000020 */
6387 #define RCC_ICSCR_MSICAL_6 (0x40U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000040 */
6388 #define RCC_ICSCR_MSICAL_7 (0x80U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000080 */
Dstm32wb1mxx.h6052 #define RCC_ICSCR_MSICAL_Pos (0U) macro
6053 #define RCC_ICSCR_MSICAL_Msk (0xFFUL << RCC_ICSCR_MSICAL_Pos) /*!< 0x000000FF */
6055 #define RCC_ICSCR_MSICAL_0 (0x01U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000001 */
6056 #define RCC_ICSCR_MSICAL_1 (0x02U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000002 */
6057 #define RCC_ICSCR_MSICAL_2 (0x04U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000004 */
6058 #define RCC_ICSCR_MSICAL_3 (0x08U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000008 */
6059 #define RCC_ICSCR_MSICAL_4 (0x10U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000010 */
6060 #define RCC_ICSCR_MSICAL_5 (0x20U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000020 */
6061 #define RCC_ICSCR_MSICAL_6 (0x40U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000040 */
6062 #define RCC_ICSCR_MSICAL_7 (0x80U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000080 */
Dstm32wb30xx.h6377 #define RCC_ICSCR_MSICAL_Pos (0U) macro
6378 #define RCC_ICSCR_MSICAL_Msk (0xFFUL << RCC_ICSCR_MSICAL_Pos) /*!< 0x000000FF */
6380 #define RCC_ICSCR_MSICAL_0 (0x01U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000001 */
6381 #define RCC_ICSCR_MSICAL_1 (0x02U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000002 */
6382 #define RCC_ICSCR_MSICAL_2 (0x04U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000004 */
6383 #define RCC_ICSCR_MSICAL_3 (0x08U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000008 */
6384 #define RCC_ICSCR_MSICAL_4 (0x10U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000010 */
6385 #define RCC_ICSCR_MSICAL_5 (0x20U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000020 */
6386 #define RCC_ICSCR_MSICAL_6 (0x40U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000040 */
6387 #define RCC_ICSCR_MSICAL_7 (0x80U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000080 */
Dstm32wb35xx.h7172 #define RCC_ICSCR_MSICAL_Pos (0U) macro
7173 #define RCC_ICSCR_MSICAL_Msk (0xFFUL << RCC_ICSCR_MSICAL_Pos) /*!< 0x000000FF */
7175 #define RCC_ICSCR_MSICAL_0 (0x01U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000001 */
7176 #define RCC_ICSCR_MSICAL_1 (0x02U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000002 */
7177 #define RCC_ICSCR_MSICAL_2 (0x04U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000004 */
7178 #define RCC_ICSCR_MSICAL_3 (0x08U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000008 */
7179 #define RCC_ICSCR_MSICAL_4 (0x10U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000010 */
7180 #define RCC_ICSCR_MSICAL_5 (0x20U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000020 */
7181 #define RCC_ICSCR_MSICAL_6 (0x40U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000040 */
7182 #define RCC_ICSCR_MSICAL_7 (0x80U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000080 */
Dstm32wb55xx.h7363 #define RCC_ICSCR_MSICAL_Pos (0U) macro
7364 #define RCC_ICSCR_MSICAL_Msk (0xFFUL << RCC_ICSCR_MSICAL_Pos) /*!< 0x000000FF */
7366 #define RCC_ICSCR_MSICAL_0 (0x01U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000001 */
7367 #define RCC_ICSCR_MSICAL_1 (0x02U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000002 */
7368 #define RCC_ICSCR_MSICAL_2 (0x04U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000004 */
7369 #define RCC_ICSCR_MSICAL_3 (0x08U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000008 */
7370 #define RCC_ICSCR_MSICAL_4 (0x10U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000010 */
7371 #define RCC_ICSCR_MSICAL_5 (0x20U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000020 */
7372 #define RCC_ICSCR_MSICAL_6 (0x40U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000040 */
7373 #define RCC_ICSCR_MSICAL_7 (0x80U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000080 */
Dstm32wb5mxx.h7363 #define RCC_ICSCR_MSICAL_Pos (0U) macro
7364 #define RCC_ICSCR_MSICAL_Msk (0xFFUL << RCC_ICSCR_MSICAL_Pos) /*!< 0x000000FF */
7366 #define RCC_ICSCR_MSICAL_0 (0x01U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000001 */
7367 #define RCC_ICSCR_MSICAL_1 (0x02U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000002 */
7368 #define RCC_ICSCR_MSICAL_2 (0x04U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000004 */
7369 #define RCC_ICSCR_MSICAL_3 (0x08U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000008 */
7370 #define RCC_ICSCR_MSICAL_4 (0x10U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000010 */
7371 #define RCC_ICSCR_MSICAL_5 (0x20U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000020 */
7372 #define RCC_ICSCR_MSICAL_6 (0x40U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000040 */
7373 #define RCC_ICSCR_MSICAL_7 (0x80U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000080 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h5920 #define RCC_ICSCR_MSICAL_Pos (0U) macro
5921 #define RCC_ICSCR_MSICAL_Msk (0xFFUL << RCC_ICSCR_MSICAL_Pos) /*!< 0x000000FF */
5923 #define RCC_ICSCR_MSICAL_0 (0x01U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000001 */
5924 #define RCC_ICSCR_MSICAL_1 (0x02U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000002 */
5925 #define RCC_ICSCR_MSICAL_2 (0x04U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000004 */
5926 #define RCC_ICSCR_MSICAL_3 (0x08U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000008 */
5927 #define RCC_ICSCR_MSICAL_4 (0x10U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000010 */
5928 #define RCC_ICSCR_MSICAL_5 (0x20U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000020 */
5929 #define RCC_ICSCR_MSICAL_6 (0x40U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000040 */
5930 #define RCC_ICSCR_MSICAL_7 (0x80U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000080 */
Dstm32wb15xx.h6052 #define RCC_ICSCR_MSICAL_Pos (0U) macro
6053 #define RCC_ICSCR_MSICAL_Msk (0xFFUL << RCC_ICSCR_MSICAL_Pos) /*!< 0x000000FF */
6055 #define RCC_ICSCR_MSICAL_0 (0x01U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000001 */
6056 #define RCC_ICSCR_MSICAL_1 (0x02U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000002 */
6057 #define RCC_ICSCR_MSICAL_2 (0x04U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000004 */
6058 #define RCC_ICSCR_MSICAL_3 (0x08U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000008 */
6059 #define RCC_ICSCR_MSICAL_4 (0x10U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000010 */
6060 #define RCC_ICSCR_MSICAL_5 (0x20U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000020 */
6061 #define RCC_ICSCR_MSICAL_6 (0x40U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000040 */
6062 #define RCC_ICSCR_MSICAL_7 (0x80U << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000080 */
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h5674 #define RCC_ICSCR_MSICAL_Pos (0U) macro
5675 #define RCC_ICSCR_MSICAL_Msk (0xFFUL << RCC_ICSCR_MSICAL_Pos) /*!< 0x000000FF */
5677 #define RCC_ICSCR_MSICAL_0 (0x01UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000001 */
5678 #define RCC_ICSCR_MSICAL_1 (0x02UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000002 */
5679 #define RCC_ICSCR_MSICAL_2 (0x04UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000004 */
5680 #define RCC_ICSCR_MSICAL_3 (0x08UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000008 */
5681 #define RCC_ICSCR_MSICAL_4 (0x10UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000010 */
5682 #define RCC_ICSCR_MSICAL_5 (0x20UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000020 */
5683 #define RCC_ICSCR_MSICAL_6 (0x40UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000040 */
5684 #define RCC_ICSCR_MSICAL_7 (0x80UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000080 */
Dstm32l412xx.h5458 #define RCC_ICSCR_MSICAL_Pos (0U) macro
5459 #define RCC_ICSCR_MSICAL_Msk (0xFFUL << RCC_ICSCR_MSICAL_Pos) /*!< 0x000000FF */
5461 #define RCC_ICSCR_MSICAL_0 (0x01UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000001 */
5462 #define RCC_ICSCR_MSICAL_1 (0x02UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000002 */
5463 #define RCC_ICSCR_MSICAL_2 (0x04UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000004 */
5464 #define RCC_ICSCR_MSICAL_3 (0x08UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000008 */
5465 #define RCC_ICSCR_MSICAL_4 (0x10UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000010 */
5466 #define RCC_ICSCR_MSICAL_5 (0x20UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000020 */
5467 #define RCC_ICSCR_MSICAL_6 (0x40UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000040 */
5468 #define RCC_ICSCR_MSICAL_7 (0x80UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000080 */
Dstm32l433xx.h9339 #define RCC_ICSCR_MSICAL_Pos (0U) macro
9340 #define RCC_ICSCR_MSICAL_Msk (0xFFUL << RCC_ICSCR_MSICAL_Pos) /*!< 0x000000FF */
9342 #define RCC_ICSCR_MSICAL_0 (0x01UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000001 */
9343 #define RCC_ICSCR_MSICAL_1 (0x02UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000002 */
9344 #define RCC_ICSCR_MSICAL_2 (0x04UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000004 */
9345 #define RCC_ICSCR_MSICAL_3 (0x08UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000008 */
9346 #define RCC_ICSCR_MSICAL_4 (0x10UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000010 */
9347 #define RCC_ICSCR_MSICAL_5 (0x20UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000020 */
9348 #define RCC_ICSCR_MSICAL_6 (0x40UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000040 */
9349 #define RCC_ICSCR_MSICAL_7 (0x80UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000080 */
Dstm32l451xx.h9498 #define RCC_ICSCR_MSICAL_Pos (0U) macro
9499 #define RCC_ICSCR_MSICAL_Msk (0xFFUL << RCC_ICSCR_MSICAL_Pos) /*!< 0x000000FF */
9501 #define RCC_ICSCR_MSICAL_0 (0x01UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000001 */
9502 #define RCC_ICSCR_MSICAL_1 (0x02UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000002 */
9503 #define RCC_ICSCR_MSICAL_2 (0x04UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000004 */
9504 #define RCC_ICSCR_MSICAL_3 (0x08UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000008 */
9505 #define RCC_ICSCR_MSICAL_4 (0x10UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000010 */
9506 #define RCC_ICSCR_MSICAL_5 (0x20UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000020 */
9507 #define RCC_ICSCR_MSICAL_6 (0x40UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000040 */
9508 #define RCC_ICSCR_MSICAL_7 (0x80UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000080 */
Dstm32l442xx.h9124 #define RCC_ICSCR_MSICAL_Pos (0U) macro
9125 #define RCC_ICSCR_MSICAL_Msk (0xFFUL << RCC_ICSCR_MSICAL_Pos) /*!< 0x000000FF */
9127 #define RCC_ICSCR_MSICAL_0 (0x01UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000001 */
9128 #define RCC_ICSCR_MSICAL_1 (0x02UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000002 */
9129 #define RCC_ICSCR_MSICAL_2 (0x04UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000004 */
9130 #define RCC_ICSCR_MSICAL_3 (0x08UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000008 */
9131 #define RCC_ICSCR_MSICAL_4 (0x10UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000010 */
9132 #define RCC_ICSCR_MSICAL_5 (0x20UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000020 */
9133 #define RCC_ICSCR_MSICAL_6 (0x40UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000040 */
9134 #define RCC_ICSCR_MSICAL_7 (0x80UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000080 */
Dstm32l431xx.h9247 #define RCC_ICSCR_MSICAL_Pos (0U) macro
9248 #define RCC_ICSCR_MSICAL_Msk (0xFFUL << RCC_ICSCR_MSICAL_Pos) /*!< 0x000000FF */
9250 #define RCC_ICSCR_MSICAL_0 (0x01UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000001 */
9251 #define RCC_ICSCR_MSICAL_1 (0x02UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000002 */
9252 #define RCC_ICSCR_MSICAL_2 (0x04UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000004 */
9253 #define RCC_ICSCR_MSICAL_3 (0x08UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000008 */
9254 #define RCC_ICSCR_MSICAL_4 (0x10UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000010 */
9255 #define RCC_ICSCR_MSICAL_5 (0x20UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000020 */
9256 #define RCC_ICSCR_MSICAL_6 (0x40UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000040 */
9257 #define RCC_ICSCR_MSICAL_7 (0x80UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000080 */
Dstm32l432xx.h8908 #define RCC_ICSCR_MSICAL_Pos (0U) macro
8909 #define RCC_ICSCR_MSICAL_Msk (0xFFUL << RCC_ICSCR_MSICAL_Pos) /*!< 0x000000FF */
8911 #define RCC_ICSCR_MSICAL_0 (0x01UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000001 */
8912 #define RCC_ICSCR_MSICAL_1 (0x02UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000002 */
8913 #define RCC_ICSCR_MSICAL_2 (0x04UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000004 */
8914 #define RCC_ICSCR_MSICAL_3 (0x08UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000008 */
8915 #define RCC_ICSCR_MSICAL_4 (0x10UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000010 */
8916 #define RCC_ICSCR_MSICAL_5 (0x20UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000020 */
8917 #define RCC_ICSCR_MSICAL_6 (0x40UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000040 */
8918 #define RCC_ICSCR_MSICAL_7 (0x80UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000080 */
Dstm32l443xx.h9555 #define RCC_ICSCR_MSICAL_Pos (0U) macro
9556 #define RCC_ICSCR_MSICAL_Msk (0xFFUL << RCC_ICSCR_MSICAL_Pos) /*!< 0x000000FF */
9558 #define RCC_ICSCR_MSICAL_0 (0x01UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000001 */
9559 #define RCC_ICSCR_MSICAL_1 (0x02UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000002 */
9560 #define RCC_ICSCR_MSICAL_2 (0x04UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000004 */
9561 #define RCC_ICSCR_MSICAL_3 (0x08UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000008 */
9562 #define RCC_ICSCR_MSICAL_4 (0x10UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000010 */
9563 #define RCC_ICSCR_MSICAL_5 (0x20UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000020 */
9564 #define RCC_ICSCR_MSICAL_6 (0x40UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000040 */
9565 #define RCC_ICSCR_MSICAL_7 (0x80UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000080 */
Dstm32l471xx.h10408 #define RCC_ICSCR_MSICAL_Pos (0U) macro
10409 #define RCC_ICSCR_MSICAL_Msk (0xFFUL << RCC_ICSCR_MSICAL_Pos) /*!< 0x000000FF */
10411 #define RCC_ICSCR_MSICAL_0 (0x01UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000001 */
10412 #define RCC_ICSCR_MSICAL_1 (0x02UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000002 */
10413 #define RCC_ICSCR_MSICAL_2 (0x04UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000004 */
10414 #define RCC_ICSCR_MSICAL_3 (0x08UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000008 */
10415 #define RCC_ICSCR_MSICAL_4 (0x10UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000010 */
10416 #define RCC_ICSCR_MSICAL_5 (0x20UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000020 */
10417 #define RCC_ICSCR_MSICAL_6 (0x40UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000040 */
10418 #define RCC_ICSCR_MSICAL_7 (0x80UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000080 */
Dstm32l452xx.h9567 #define RCC_ICSCR_MSICAL_Pos (0U) macro
9568 #define RCC_ICSCR_MSICAL_Msk (0xFFUL << RCC_ICSCR_MSICAL_Pos) /*!< 0x000000FF */
9570 #define RCC_ICSCR_MSICAL_0 (0x01UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000001 */
9571 #define RCC_ICSCR_MSICAL_1 (0x02UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000002 */
9572 #define RCC_ICSCR_MSICAL_2 (0x04UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000004 */
9573 #define RCC_ICSCR_MSICAL_3 (0x08UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000008 */
9574 #define RCC_ICSCR_MSICAL_4 (0x10UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000010 */
9575 #define RCC_ICSCR_MSICAL_5 (0x20UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000020 */
9576 #define RCC_ICSCR_MSICAL_6 (0x40UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000040 */
9577 #define RCC_ICSCR_MSICAL_7 (0x80UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000080 */
Dstm32l462xx.h9783 #define RCC_ICSCR_MSICAL_Pos (0U) macro
9784 #define RCC_ICSCR_MSICAL_Msk (0xFFUL << RCC_ICSCR_MSICAL_Pos) /*!< 0x000000FF */
9786 #define RCC_ICSCR_MSICAL_0 (0x01UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000001 */
9787 #define RCC_ICSCR_MSICAL_1 (0x02UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000002 */
9788 #define RCC_ICSCR_MSICAL_2 (0x04UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000004 */
9789 #define RCC_ICSCR_MSICAL_3 (0x08UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000008 */
9790 #define RCC_ICSCR_MSICAL_4 (0x10UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000010 */
9791 #define RCC_ICSCR_MSICAL_5 (0x20UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000020 */
9792 #define RCC_ICSCR_MSICAL_6 (0x40UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000040 */
9793 #define RCC_ICSCR_MSICAL_7 (0x80UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000080 */
Dstm32l475xx.h10572 #define RCC_ICSCR_MSICAL_Pos (0U) macro
10573 #define RCC_ICSCR_MSICAL_Msk (0xFFUL << RCC_ICSCR_MSICAL_Pos) /*!< 0x000000FF */
10575 #define RCC_ICSCR_MSICAL_0 (0x01UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000001 */
10576 #define RCC_ICSCR_MSICAL_1 (0x02UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000002 */
10577 #define RCC_ICSCR_MSICAL_2 (0x04UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000004 */
10578 #define RCC_ICSCR_MSICAL_3 (0x08UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000008 */
10579 #define RCC_ICSCR_MSICAL_4 (0x10UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000010 */
10580 #define RCC_ICSCR_MSICAL_5 (0x20UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000020 */
10581 #define RCC_ICSCR_MSICAL_6 (0x40UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000040 */
10582 #define RCC_ICSCR_MSICAL_7 (0x80UL << RCC_ICSCR_MSICAL_Pos) /*!< 0x00000080 */
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_rcc.h865 return (uint32_t)(READ_BIT(RCC->ICSCR, RCC_ICSCR_MSICAL) >> RCC_ICSCR_MSICAL_Pos); in LL_RCC_MSI_GetCalibration()
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_rcc.h1230 return (uint32_t)(READ_BIT(RCC->ICSCR, RCC_ICSCR_MSICAL) >> RCC_ICSCR_MSICAL_Pos); in LL_RCC_MSI_GetCalibration()

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