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Searched refs:RCC_CFGR_PPRE_DIV8_Pos (Results 1 – 16 of 16) sorted by relevance

/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f030x6.h2840 #define RCC_CFGR_PPRE_DIV8_Pos (9U) macro
2841 #define RCC_CFGR_PPRE_DIV8_Msk (0x3UL << RCC_CFGR_PPRE_DIV8_Pos) /*!< 0x00000600 …
Dstm32f030x8.h2870 #define RCC_CFGR_PPRE_DIV8_Pos (9U) macro
2871 #define RCC_CFGR_PPRE_DIV8_Msk (0x3UL << RCC_CFGR_PPRE_DIV8_Pos) /*!< 0x00000600 …
Dstm32f070x6.h2894 #define RCC_CFGR_PPRE_DIV8_Pos (9U) macro
2895 #define RCC_CFGR_PPRE_DIV8_Msk (0x3UL << RCC_CFGR_PPRE_DIV8_Pos) /*!< 0x00000600 …
Dstm32f031x6.h2966 #define RCC_CFGR_PPRE_DIV8_Pos (9U) macro
2967 #define RCC_CFGR_PPRE_DIV8_Msk (0x3UL << RCC_CFGR_PPRE_DIV8_Pos) /*!< 0x00000600 …
Dstm32f030xc.h3134 #define RCC_CFGR_PPRE_DIV8_Pos (9U) macro
3135 #define RCC_CFGR_PPRE_DIV8_Msk (0x3UL << RCC_CFGR_PPRE_DIV8_Pos) /*!< 0x00000600 …
Dstm32f038xx.h2941 #define RCC_CFGR_PPRE_DIV8_Pos (9U) macro
2942 #define RCC_CFGR_PPRE_DIV8_Msk (0x3UL << RCC_CFGR_PPRE_DIV8_Pos) /*!< 0x00000600 …
Dstm32f070xb.h2986 #define RCC_CFGR_PPRE_DIV8_Pos (9U) macro
2987 #define RCC_CFGR_PPRE_DIV8_Msk (0x3UL << RCC_CFGR_PPRE_DIV8_Pos) /*!< 0x00000600 …
Dstm32f058xx.h3390 #define RCC_CFGR_PPRE_DIV8_Pos (9U) macro
3391 #define RCC_CFGR_PPRE_DIV8_Msk (0x3UL << RCC_CFGR_PPRE_DIV8_Pos) /*!< 0x00000600 …
Dstm32f051x8.h3415 #define RCC_CFGR_PPRE_DIV8_Pos (9U) macro
3416 #define RCC_CFGR_PPRE_DIV8_Msk (0x3UL << RCC_CFGR_PPRE_DIV8_Pos) /*!< 0x00000600 …
Dstm32f071xb.h3809 #define RCC_CFGR_PPRE_DIV8_Pos (9U) macro
3810 #define RCC_CFGR_PPRE_DIV8_Msk (0x3UL << RCC_CFGR_PPRE_DIV8_Pos) /*!< 0x00000600 …
Dstm32f042x6.h7132 #define RCC_CFGR_PPRE_DIV8_Pos (9U) macro
7133 #define RCC_CFGR_PPRE_DIV8_Msk (0x3UL << RCC_CFGR_PPRE_DIV8_Pos) /*!< 0x00000600 …
Dstm32f048xx.h7108 #define RCC_CFGR_PPRE_DIV8_Pos (9U) macro
7109 #define RCC_CFGR_PPRE_DIV8_Msk (0x3UL << RCC_CFGR_PPRE_DIV8_Pos) /*!< 0x00000600 …
Dstm32f072xb.h7579 #define RCC_CFGR_PPRE_DIV8_Pos (9U) macro
7580 #define RCC_CFGR_PPRE_DIV8_Msk (0x3UL << RCC_CFGR_PPRE_DIV8_Pos) /*!< 0x00000600 …
Dstm32f091xc.h8042 #define RCC_CFGR_PPRE_DIV8_Pos (9U) macro
8043 #define RCC_CFGR_PPRE_DIV8_Msk (0x3UL << RCC_CFGR_PPRE_DIV8_Pos) /*!< 0x00000600 …
Dstm32f098xx.h8018 #define RCC_CFGR_PPRE_DIV8_Pos (9U) macro
8019 #define RCC_CFGR_PPRE_DIV8_Msk (0x3UL << RCC_CFGR_PPRE_DIV8_Pos) /*!< 0x00000600 …
Dstm32f078xx.h7555 #define RCC_CFGR_PPRE_DIV8_Pos (9U) macro
7556 #define RCC_CFGR_PPRE_DIV8_Msk (0x3UL << RCC_CFGR_PPRE_DIV8_Pos) /*!< 0x00000600 …