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Searched refs:RCC_CFGR_PPRE_DIV4_Pos (Results 1 – 16 of 16) sorted by relevance

/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f030x6.h2837 #define RCC_CFGR_PPRE_DIV4_Pos (8U) macro
2838 #define RCC_CFGR_PPRE_DIV4_Msk (0x5UL << RCC_CFGR_PPRE_DIV4_Pos) /*!< 0x00000500 …
Dstm32f030x8.h2867 #define RCC_CFGR_PPRE_DIV4_Pos (8U) macro
2868 #define RCC_CFGR_PPRE_DIV4_Msk (0x5UL << RCC_CFGR_PPRE_DIV4_Pos) /*!< 0x00000500 …
Dstm32f070x6.h2891 #define RCC_CFGR_PPRE_DIV4_Pos (8U) macro
2892 #define RCC_CFGR_PPRE_DIV4_Msk (0x5UL << RCC_CFGR_PPRE_DIV4_Pos) /*!< 0x00000500 …
Dstm32f031x6.h2963 #define RCC_CFGR_PPRE_DIV4_Pos (8U) macro
2964 #define RCC_CFGR_PPRE_DIV4_Msk (0x5UL << RCC_CFGR_PPRE_DIV4_Pos) /*!< 0x00000500 …
Dstm32f030xc.h3131 #define RCC_CFGR_PPRE_DIV4_Pos (8U) macro
3132 #define RCC_CFGR_PPRE_DIV4_Msk (0x5UL << RCC_CFGR_PPRE_DIV4_Pos) /*!< 0x00000500 …
Dstm32f038xx.h2938 #define RCC_CFGR_PPRE_DIV4_Pos (8U) macro
2939 #define RCC_CFGR_PPRE_DIV4_Msk (0x5UL << RCC_CFGR_PPRE_DIV4_Pos) /*!< 0x00000500 …
Dstm32f070xb.h2983 #define RCC_CFGR_PPRE_DIV4_Pos (8U) macro
2984 #define RCC_CFGR_PPRE_DIV4_Msk (0x5UL << RCC_CFGR_PPRE_DIV4_Pos) /*!< 0x00000500 …
Dstm32f058xx.h3387 #define RCC_CFGR_PPRE_DIV4_Pos (8U) macro
3388 #define RCC_CFGR_PPRE_DIV4_Msk (0x5UL << RCC_CFGR_PPRE_DIV4_Pos) /*!< 0x00000500 …
Dstm32f051x8.h3412 #define RCC_CFGR_PPRE_DIV4_Pos (8U) macro
3413 #define RCC_CFGR_PPRE_DIV4_Msk (0x5UL << RCC_CFGR_PPRE_DIV4_Pos) /*!< 0x00000500 …
Dstm32f071xb.h3806 #define RCC_CFGR_PPRE_DIV4_Pos (8U) macro
3807 #define RCC_CFGR_PPRE_DIV4_Msk (0x5UL << RCC_CFGR_PPRE_DIV4_Pos) /*!< 0x00000500 …
Dstm32f042x6.h7129 #define RCC_CFGR_PPRE_DIV4_Pos (8U) macro
7130 #define RCC_CFGR_PPRE_DIV4_Msk (0x5UL << RCC_CFGR_PPRE_DIV4_Pos) /*!< 0x00000500 …
Dstm32f048xx.h7105 #define RCC_CFGR_PPRE_DIV4_Pos (8U) macro
7106 #define RCC_CFGR_PPRE_DIV4_Msk (0x5UL << RCC_CFGR_PPRE_DIV4_Pos) /*!< 0x00000500 …
Dstm32f072xb.h7576 #define RCC_CFGR_PPRE_DIV4_Pos (8U) macro
7577 #define RCC_CFGR_PPRE_DIV4_Msk (0x5UL << RCC_CFGR_PPRE_DIV4_Pos) /*!< 0x00000500 …
Dstm32f091xc.h8039 #define RCC_CFGR_PPRE_DIV4_Pos (8U) macro
8040 #define RCC_CFGR_PPRE_DIV4_Msk (0x5UL << RCC_CFGR_PPRE_DIV4_Pos) /*!< 0x00000500 …
Dstm32f098xx.h8015 #define RCC_CFGR_PPRE_DIV4_Pos (8U) macro
8016 #define RCC_CFGR_PPRE_DIV4_Msk (0x5UL << RCC_CFGR_PPRE_DIV4_Pos) /*!< 0x00000500 …
Dstm32f078xx.h7552 #define RCC_CFGR_PPRE_DIV4_Pos (8U) macro
7553 #define RCC_CFGR_PPRE_DIV4_Msk (0x5UL << RCC_CFGR_PPRE_DIV4_Pos) /*!< 0x00000500 …