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Searched refs:RCC_CFGR_PPRE_DIV2_Pos (Results 1 – 16 of 16) sorted by relevance

/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f030x6.h2834 #define RCC_CFGR_PPRE_DIV2_Pos (10U) macro
2835 #define RCC_CFGR_PPRE_DIV2_Msk (0x1UL << RCC_CFGR_PPRE_DIV2_Pos) /*!< 0x00000400 …
Dstm32f030x8.h2864 #define RCC_CFGR_PPRE_DIV2_Pos (10U) macro
2865 #define RCC_CFGR_PPRE_DIV2_Msk (0x1UL << RCC_CFGR_PPRE_DIV2_Pos) /*!< 0x00000400 …
Dstm32f070x6.h2888 #define RCC_CFGR_PPRE_DIV2_Pos (10U) macro
2889 #define RCC_CFGR_PPRE_DIV2_Msk (0x1UL << RCC_CFGR_PPRE_DIV2_Pos) /*!< 0x00000400 …
Dstm32f031x6.h2960 #define RCC_CFGR_PPRE_DIV2_Pos (10U) macro
2961 #define RCC_CFGR_PPRE_DIV2_Msk (0x1UL << RCC_CFGR_PPRE_DIV2_Pos) /*!< 0x00000400 …
Dstm32f030xc.h3128 #define RCC_CFGR_PPRE_DIV2_Pos (10U) macro
3129 #define RCC_CFGR_PPRE_DIV2_Msk (0x1UL << RCC_CFGR_PPRE_DIV2_Pos) /*!< 0x00000400 …
Dstm32f038xx.h2935 #define RCC_CFGR_PPRE_DIV2_Pos (10U) macro
2936 #define RCC_CFGR_PPRE_DIV2_Msk (0x1UL << RCC_CFGR_PPRE_DIV2_Pos) /*!< 0x00000400 …
Dstm32f070xb.h2980 #define RCC_CFGR_PPRE_DIV2_Pos (10U) macro
2981 #define RCC_CFGR_PPRE_DIV2_Msk (0x1UL << RCC_CFGR_PPRE_DIV2_Pos) /*!< 0x00000400 …
Dstm32f058xx.h3384 #define RCC_CFGR_PPRE_DIV2_Pos (10U) macro
3385 #define RCC_CFGR_PPRE_DIV2_Msk (0x1UL << RCC_CFGR_PPRE_DIV2_Pos) /*!< 0x00000400 …
Dstm32f051x8.h3409 #define RCC_CFGR_PPRE_DIV2_Pos (10U) macro
3410 #define RCC_CFGR_PPRE_DIV2_Msk (0x1UL << RCC_CFGR_PPRE_DIV2_Pos) /*!< 0x00000400 …
Dstm32f071xb.h3803 #define RCC_CFGR_PPRE_DIV2_Pos (10U) macro
3804 #define RCC_CFGR_PPRE_DIV2_Msk (0x1UL << RCC_CFGR_PPRE_DIV2_Pos) /*!< 0x00000400 …
Dstm32f042x6.h7126 #define RCC_CFGR_PPRE_DIV2_Pos (10U) macro
7127 #define RCC_CFGR_PPRE_DIV2_Msk (0x1UL << RCC_CFGR_PPRE_DIV2_Pos) /*!< 0x00000400 …
Dstm32f048xx.h7102 #define RCC_CFGR_PPRE_DIV2_Pos (10U) macro
7103 #define RCC_CFGR_PPRE_DIV2_Msk (0x1UL << RCC_CFGR_PPRE_DIV2_Pos) /*!< 0x00000400 …
Dstm32f072xb.h7573 #define RCC_CFGR_PPRE_DIV2_Pos (10U) macro
7574 #define RCC_CFGR_PPRE_DIV2_Msk (0x1UL << RCC_CFGR_PPRE_DIV2_Pos) /*!< 0x00000400 …
Dstm32f091xc.h8036 #define RCC_CFGR_PPRE_DIV2_Pos (10U) macro
8037 #define RCC_CFGR_PPRE_DIV2_Msk (0x1UL << RCC_CFGR_PPRE_DIV2_Pos) /*!< 0x00000400 …
Dstm32f098xx.h8012 #define RCC_CFGR_PPRE_DIV2_Pos (10U) macro
8013 #define RCC_CFGR_PPRE_DIV2_Msk (0x1UL << RCC_CFGR_PPRE_DIV2_Pos) /*!< 0x00000400 …
Dstm32f078xx.h7549 #define RCC_CFGR_PPRE_DIV2_Pos (10U) macro
7550 #define RCC_CFGR_PPRE_DIV2_Msk (0x1UL << RCC_CFGR_PPRE_DIV2_Pos) /*!< 0x00000400 …