| /hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/ |
| D | stm32f1xx_ll_rcc.h | 444 #define LL_RCC_PLLSOURCE_HSE_DIV_2 (RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE) /*!< HSE/2…
472 #define LL_RCC_PREDIV_DIV_2 RCC_CFGR_PLLXTPRE /*!< HSE divider clock divided …
1477 MODIFY_REG(RCC->CFGR, RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL, in LL_RCC_PLL_ConfigDomain_SYS()
1478 (Source & (RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE)) | PLLMul); in LL_RCC_PLL_ConfigDomain_SYS()
1587 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos); in LL_RCC_PLL_GetPrediv()
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| D | stm32f1xx_hal_rcc_ex.h | 469 #define RCC_HSE_PREDIV_DIV2 RCC_CFGR_PLLXTPRE
1600 MODIFY_REG(RCC->CFGR,RCC_CFGR_PLLXTPRE, (uint32_t)(__HSE_PREDIV_VALUE__))
1615 #define __HAL_RCC_HSE_GET_PREDIV() READ_BIT(RCC->CFGR, RCC_CFGR_PLLXTPRE)
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| /hal_stm32-latest/stm32cube/stm32f1xx/soc/ |
| D | system_stm32f1xx.c | 269 if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET) in SystemCoreClockUpdate()
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| D | stm32f101x6.h | 898 #define RCC_CFGR_PLLXTPRE RCC_CFGR_PLLXTPRE_Msk /*!< HSE divider for… macro
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| D | stm32f101xb.h | 913 #define RCC_CFGR_PLLXTPRE RCC_CFGR_PLLXTPRE_Msk /*!< HSE divider for… macro
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| D | stm32f100xb.h | 973 #define RCC_CFGR_PLLXTPRE RCC_CFGR_PLLXTPRE_Msk /*!< HSE divider for… macro
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| D | stm32f102x6.h | 938 #define RCC_CFGR_PLLXTPRE RCC_CFGR_PLLXTPRE_Msk /*!< HSE divider for… macro
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| D | stm32f100xe.h | 1242 #define RCC_CFGR_PLLXTPRE RCC_CFGR_PLLXTPRE_Msk /*!< HSE divider for… macro
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| D | stm32f101xg.h | 1267 #define RCC_CFGR_PLLXTPRE RCC_CFGR_PLLXTPRE_Msk /*!< HSE divider for… macro
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| D | stm32f101xe.h | 1242 #define RCC_CFGR_PLLXTPRE RCC_CFGR_PLLXTPRE_Msk /*!< HSE divider for… macro
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| D | stm32f102xb.h | 951 #define RCC_CFGR_PLLXTPRE RCC_CFGR_PLLXTPRE_Msk /*!< HSE divider for… macro
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| /hal_stm32-latest/stm32cube/stm32f1xx/drivers/src/ |
| D | stm32f1xx_hal_rcc_ex.c | 426 … prediv1 = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; in HAL_RCCEx_GetPeriphCLKFreq()
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| D | stm32f1xx_hal_rcc.c | 1118 … prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; in HAL_RCC_GetSysClockFreq()
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| /hal_stm32-latest/stm32cube/stm32f0xx/soc/ |
| D | stm32f030x6.h | 2863 #define RCC_CFGR_PLLXTPRE RCC_CFGR_PLLXTPRE_Msk /*!< HSE divider for… macro
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| D | stm32f030x8.h | 2893 #define RCC_CFGR_PLLXTPRE RCC_CFGR_PLLXTPRE_Msk /*!< HSE divider for… macro
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| D | stm32f070x6.h | 2918 #define RCC_CFGR_PLLXTPRE RCC_CFGR_PLLXTPRE_Msk /*!< HSE divider for… macro
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| D | stm32f031x6.h | 2989 #define RCC_CFGR_PLLXTPRE RCC_CFGR_PLLXTPRE_Msk /*!< HSE divider for… macro
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| D | stm32f030xc.h | 3150 #define RCC_CFGR_PLLXTPRE RCC_CFGR_PLLXTPRE_Msk /*!< HSE divider for… macro
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| D | stm32f038xx.h | 2964 #define RCC_CFGR_PLLXTPRE RCC_CFGR_PLLXTPRE_Msk /*!< HSE divider for… macro
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| D | stm32f070xb.h | 3010 #define RCC_CFGR_PLLXTPRE RCC_CFGR_PLLXTPRE_Msk /*!< HSE divider for… macro
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| D | stm32f058xx.h | 3413 #define RCC_CFGR_PLLXTPRE RCC_CFGR_PLLXTPRE_Msk /*!< HSE divider for… macro
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| D | stm32f051x8.h | 3438 #define RCC_CFGR_PLLXTPRE RCC_CFGR_PLLXTPRE_Msk /*!< HSE divider for… macro
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| D | stm32f071xb.h | 3834 #define RCC_CFGR_PLLXTPRE RCC_CFGR_PLLXTPRE_Msk /*!< HSE divider for… macro
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| /hal_stm32-latest/stm32cube/stm32f3xx/soc/ |
| D | stm32f301x8.h | 4832 #define RCC_CFGR_PLLXTPRE RCC_CFGR_PLLXTPRE_Msk /*!< HSE divider for… macro
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| D | stm32f318xx.h | 4825 #define RCC_CFGR_PLLXTPRE RCC_CFGR_PLLXTPRE_Msk /*!< HSE divider for… macro
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