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Searched refs:RCC_CFGR_ADCPRE_DIV4 (Results 1 – 25 of 33) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_rcc.h319 #define LL_RCC_ADC_CLKSRC_PCLK2_DIV_4 RCC_CFGR_ADCPRE_DIV4 /*ADC prescaler PCLK2 divided by 4*/
Dstm32f1xx_hal_rcc_ex.h350 #define RCC_ADCPCLK2_DIV4 RCC_CFGR_ADCPRE_DIV4
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_rcc.h464 #define LL_RCC_ADC_CLKSRC_PCLK2_DIV_4 RCC_CFGR_ADCPRE_DIV4 /*!< ADC prescaler PCLK divided …
Dstm32f3xx_hal_rcc_ex.h1673 #define RCC_ADC1PCLK2_DIV4 RCC_CFGR_ADCPRE_DIV4
/hal_stm32-latest/stm32cube/stm32f1xx/soc/
Dstm32f101x6.h888 #define RCC_CFGR_ADCPRE_DIV4 0x00004000U /*!< PCLK2 divided b… macro
Dstm32f101xb.h903 #define RCC_CFGR_ADCPRE_DIV4 0x00004000U /*!< PCLK2 divided b… macro
Dstm32f100xb.h963 #define RCC_CFGR_ADCPRE_DIV4 0x00004000U /*!< PCLK2 divided b… macro
Dstm32f102x6.h928 #define RCC_CFGR_ADCPRE_DIV4 0x00004000U /*!< PCLK2 divided b… macro
Dstm32f100xe.h1232 #define RCC_CFGR_ADCPRE_DIV4 0x00004000U /*!< PCLK2 divided b… macro
Dstm32f101xg.h1257 #define RCC_CFGR_ADCPRE_DIV4 0x00004000U /*!< PCLK2 divided b… macro
Dstm32f101xe.h1232 #define RCC_CFGR_ADCPRE_DIV4 0x00004000U /*!< PCLK2 divided b… macro
Dstm32f102xb.h941 #define RCC_CFGR_ADCPRE_DIV4 0x00004000U /*!< PCLK2 divided b… macro
Dstm32f103x6.h1003 #define RCC_CFGR_ADCPRE_DIV4 0x00004000U /*!< PCLK2 divided b… macro
Dstm32f103xb.h1018 #define RCC_CFGR_ADCPRE_DIV4 0x00004000U /*!< PCLK2 divided b… macro
/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f030x6.h2853 #define RCC_CFGR_ADCPRE_DIV4 (0x00004000U) /*!< PCLK divided by… macro
Dstm32f030x8.h2883 #define RCC_CFGR_ADCPRE_DIV4 (0x00004000U) /*!< PCLK divided by… macro
Dstm32f070x6.h2907 #define RCC_CFGR_ADCPRE_DIV4 (0x00004000U) /*!< PCLK divided by… macro
Dstm32f031x6.h2979 #define RCC_CFGR_ADCPRE_DIV4 (0x00004000U) /*!< PCLK divided by… macro
Dstm32f038xx.h2954 #define RCC_CFGR_ADCPRE_DIV4 (0x00004000U) /*!< PCLK divided by… macro
Dstm32f070xb.h2999 #define RCC_CFGR_ADCPRE_DIV4 (0x00004000U) /*!< PCLK divided by… macro
Dstm32f058xx.h3403 #define RCC_CFGR_ADCPRE_DIV4 (0x00004000U) /*!< PCLK divided by… macro
Dstm32f051x8.h3428 #define RCC_CFGR_ADCPRE_DIV4 (0x00004000U) /*!< PCLK divided by… macro
Dstm32f071xb.h3822 #define RCC_CFGR_ADCPRE_DIV4 (0x00004000U) /*!< PCLK divided by… macro
Dstm32f042x6.h7145 #define RCC_CFGR_ADCPRE_DIV4 (0x00004000U) /*!< PCLK divided by… macro
Dstm32f048xx.h7121 #define RCC_CFGR_ADCPRE_DIV4 (0x00004000U) /*!< PCLK divided by… macro

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