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Searched refs:RCC_CFGR_ADCPRE_DIV2 (Results 1 – 25 of 33) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_rcc.h318 #define LL_RCC_ADC_CLKSRC_PCLK2_DIV_2 RCC_CFGR_ADCPRE_DIV2 /*ADC prescaler PCLK2 divided by 2*/
Dstm32f1xx_hal_rcc_ex.h349 #define RCC_ADCPCLK2_DIV2 RCC_CFGR_ADCPRE_DIV2
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_rcc.h463 #define LL_RCC_ADC_CLKSRC_PCLK2_DIV_2 RCC_CFGR_ADCPRE_DIV2 /*!< ADC prescaler PCLK divided …
Dstm32f3xx_hal_rcc_ex.h1672 #define RCC_ADC1PCLK2_DIV2 RCC_CFGR_ADCPRE_DIV2
/hal_stm32-latest/stm32cube/stm32f1xx/soc/
Dstm32f101x6.h887 #define RCC_CFGR_ADCPRE_DIV2 0x00000000U /*!< PCLK2 divided b… macro
Dstm32f101xb.h902 #define RCC_CFGR_ADCPRE_DIV2 0x00000000U /*!< PCLK2 divided b… macro
Dstm32f100xb.h962 #define RCC_CFGR_ADCPRE_DIV2 0x00000000U /*!< PCLK2 divided b… macro
Dstm32f102x6.h927 #define RCC_CFGR_ADCPRE_DIV2 0x00000000U /*!< PCLK2 divided b… macro
Dstm32f100xe.h1231 #define RCC_CFGR_ADCPRE_DIV2 0x00000000U /*!< PCLK2 divided b… macro
Dstm32f101xg.h1256 #define RCC_CFGR_ADCPRE_DIV2 0x00000000U /*!< PCLK2 divided b… macro
Dstm32f101xe.h1231 #define RCC_CFGR_ADCPRE_DIV2 0x00000000U /*!< PCLK2 divided b… macro
Dstm32f102xb.h940 #define RCC_CFGR_ADCPRE_DIV2 0x00000000U /*!< PCLK2 divided b… macro
Dstm32f103x6.h1002 #define RCC_CFGR_ADCPRE_DIV2 0x00000000U /*!< PCLK2 divided b… macro
Dstm32f103xb.h1017 #define RCC_CFGR_ADCPRE_DIV2 0x00000000U /*!< PCLK2 divided b… macro
/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f030x6.h2852 #define RCC_CFGR_ADCPRE_DIV2 (0x00000000U) /*!< PCLK divided by… macro
Dstm32f030x8.h2882 #define RCC_CFGR_ADCPRE_DIV2 (0x00000000U) /*!< PCLK divided by… macro
Dstm32f070x6.h2906 #define RCC_CFGR_ADCPRE_DIV2 (0x00000000U) /*!< PCLK divided by… macro
Dstm32f031x6.h2978 #define RCC_CFGR_ADCPRE_DIV2 (0x00000000U) /*!< PCLK divided by… macro
Dstm32f038xx.h2953 #define RCC_CFGR_ADCPRE_DIV2 (0x00000000U) /*!< PCLK divided by… macro
Dstm32f070xb.h2998 #define RCC_CFGR_ADCPRE_DIV2 (0x00000000U) /*!< PCLK divided by… macro
Dstm32f058xx.h3402 #define RCC_CFGR_ADCPRE_DIV2 (0x00000000U) /*!< PCLK divided by… macro
Dstm32f051x8.h3427 #define RCC_CFGR_ADCPRE_DIV2 (0x00000000U) /*!< PCLK divided by… macro
Dstm32f071xb.h3821 #define RCC_CFGR_ADCPRE_DIV2 (0x00000000U) /*!< PCLK divided by… macro
Dstm32f042x6.h7144 #define RCC_CFGR_ADCPRE_DIV2 (0x00000000U) /*!< PCLK divided by… macro
Dstm32f048xx.h7120 #define RCC_CFGR_ADCPRE_DIV2 (0x00000000U) /*!< PCLK divided by… macro

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