Searched refs:RCC_CFGR3_TIM1SW_PLL_Msk (Results 1 – 12 of 12) sorted by relevance
5327 #define RCC_CFGR3_TIM1SW_PLL_Msk (0x1UL << RCC_CFGR3_TIM1SW_PLL_Pos) /*!< 0x0000010… macro5328 #define RCC_CFGR3_TIM1SW_PLL RCC_CFGR3_TIM1SW_PLL_Msk /*!< PLL clock used …
5317 #define RCC_CFGR3_TIM1SW_PLL_Msk (0x1UL << RCC_CFGR3_TIM1SW_PLL_Pos) /*!< 0x0000010… macro5318 #define RCC_CFGR3_TIM1SW_PLL RCC_CFGR3_TIM1SW_PLL_Msk /*!< PLL clock used …
8955 #define RCC_CFGR3_TIM1SW_PLL_Msk (0x1UL << RCC_CFGR3_TIM1SW_PLL_Pos) /*!< 0x0000010… macro8956 #define RCC_CFGR3_TIM1SW_PLL RCC_CFGR3_TIM1SW_PLL_Msk /*!< PLL clock used …
8877 #define RCC_CFGR3_TIM1SW_PLL_Msk (0x1UL << RCC_CFGR3_TIM1SW_PLL_Pos) /*!< 0x0000010… macro8878 #define RCC_CFGR3_TIM1SW_PLL RCC_CFGR3_TIM1SW_PLL_Msk /*!< PLL clock used …
9203 #define RCC_CFGR3_TIM1SW_PLL_Msk (0x1UL << RCC_CFGR3_TIM1SW_PLL_Pos) /*!< 0x0000010… macro9204 #define RCC_CFGR3_TIM1SW_PLL RCC_CFGR3_TIM1SW_PLL_Msk /*!< PLL clock used …
8904 #define RCC_CFGR3_TIM1SW_PLL_Msk (0x1UL << RCC_CFGR3_TIM1SW_PLL_Pos) /*!< 0x0000010… macro8905 #define RCC_CFGR3_TIM1SW_PLL RCC_CFGR3_TIM1SW_PLL_Msk /*!< PLL clock used …
9733 #define RCC_CFGR3_TIM1SW_PLL_Msk (0x1UL << RCC_CFGR3_TIM1SW_PLL_Pos) /*!< 0x0000010… macro9734 #define RCC_CFGR3_TIM1SW_PLL RCC_CFGR3_TIM1SW_PLL_Msk /*!< PLL clock used …
9836 #define RCC_CFGR3_TIM1SW_PLL_Msk (0x1UL << RCC_CFGR3_TIM1SW_PLL_Pos) /*!< 0x0000010… macro9837 #define RCC_CFGR3_TIM1SW_PLL RCC_CFGR3_TIM1SW_PLL_Msk /*!< PLL clock used …
10859 #define RCC_CFGR3_TIM1SW_PLL_Msk (0x1UL << RCC_CFGR3_TIM1SW_PLL_Pos) /*!< 0x0000010… macro10860 #define RCC_CFGR3_TIM1SW_PLL RCC_CFGR3_TIM1SW_PLL_Msk /*!< PLL clock used …
11473 #define RCC_CFGR3_TIM1SW_PLL_Msk (0x1UL << RCC_CFGR3_TIM1SW_PLL_Pos) /*!< 0x0000010… macro11474 #define RCC_CFGR3_TIM1SW_PLL RCC_CFGR3_TIM1SW_PLL_Msk /*!< PLL clock used …
11368 #define RCC_CFGR3_TIM1SW_PLL_Msk (0x1UL << RCC_CFGR3_TIM1SW_PLL_Pos) /*!< 0x0000010… macro11369 #define RCC_CFGR3_TIM1SW_PLL RCC_CFGR3_TIM1SW_PLL_Msk /*!< PLL clock used …
12006 #define RCC_CFGR3_TIM1SW_PLL_Msk (0x1UL << RCC_CFGR3_TIM1SW_PLL_Pos) /*!< 0x0000010… macro12007 #define RCC_CFGR3_TIM1SW_PLL RCC_CFGR3_TIM1SW_PLL_Msk /*!< PLL clock used …
