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Searched refs:RCC_CCIPR_CLK48SEL_1 (Results 1 – 25 of 57) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_hal_rcc_ex.h349 #define RCC_USBCLKSOURCE_PLLQ RCC_CCIPR_CLK48SEL_1
361 #define RCC_RNGCLKSOURCE_PLLQ RCC_CCIPR_CLK48SEL_1
Dstm32u0xx_ll_rcc.h525 #define LL_RCC_USB_CLKSOURCE_PLLQ RCC_CCIPR_CLK48SEL_1 /*!< PLL clock used as USB clock so…
537 #define LL_RCC_RNG_CLKSOURCE_PLLQ RCC_CCIPR_CLK48SEL_1 /*!< PLL clock used as RNG clock so…
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_rcc_ex.h596 #define RCC_SDMMC1CLKSOURCE_PLL RCC_CCIPR_CLK48SEL_1 /*!< PLL "Q" clock selected as SDMM…
617 #define RCC_RNGCLKSOURCE_PLL RCC_CCIPR_CLK48SEL_1
635 #define RCC_USBCLKSOURCE_PLL RCC_CCIPR_CLK48SEL_1
Dstm32l4xx_ll_rcc.h532 #define LL_RCC_SDMMC1_CLKSOURCE_PLL RCC_CCIPR_CLK48SEL_1 /*!< PLL clock used as SDMMC1 clock…
550 #define LL_RCC_RNG_CLKSOURCE_PLL RCC_CCIPR_CLK48SEL_1 /*!< PLL clock used as RNG clock so…
568 #define LL_RCC_USB_CLKSOURCE_PLL RCC_CCIPR_CLK48SEL_1 /*!< PLL clock used as USB clock so…
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_hal_rcc_ex.h386 #define RCC_RNGCLKSOURCE_PLL RCC_CCIPR_CLK48SEL_1
395 #define RCC_USBCLKSOURCE_PLL RCC_CCIPR_CLK48SEL_1
Dstm32g4xx_ll_rcc.h432 #define LL_RCC_RNG_CLKSOURCE_PLL RCC_CCIPR_CLK48SEL_1 /*!< PLL clock used as RNG clock …
441 #define LL_RCC_USB_CLKSOURCE_PLL RCC_CCIPR_CLK48SEL_1 /*!< PLL clock used as USB clock …
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_hal_rcc_ex.c1295 case RCC_CCIPR_CLK48SEL_1: /* PLL ? */ in HAL_RCCEx_GetPeriphCLKFreq()
1387 case RCC_CCIPR_CLK48SEL_1: /* PLL "Q" ? */ in HAL_RCCEx_GetPeriphCLKFreq()
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_rcc.h514 #define LL_RCC_CLK48_CLKSOURCE_PLL RCC_CCIPR_CLK48SEL_1 /*!< PLL selected as CLK48 clock …
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h5624 #define RCC_CCIPR_CLK48SEL_1 (0x2UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x08000000 */ macro
Dstm32u083xx.h6498 #define RCC_CCIPR_CLK48SEL_1 (0x2UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x08000000 */ macro
Dstm32u073xx.h6231 #define RCC_CCIPR_CLK48SEL_1 (0x2UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x08000000 */ macro
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb50xx.h6954 #define RCC_CCIPR_CLK48SEL_1 (0x2U << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x08000000 */ macro
Dstm32wb1mxx.h6644 #define RCC_CCIPR_CLK48SEL_1 (0x2U << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x08000000 */ macro
Dstm32wb30xx.h6953 #define RCC_CCIPR_CLK48SEL_1 (0x2U << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x08000000 */ macro
Dstm32wb35xx.h7910 #define RCC_CCIPR_CLK48SEL_1 (0x2U << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x08000000 */ macro
Dstm32wb55xx.h8137 #define RCC_CCIPR_CLK48SEL_1 (0x2U << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x08000000 */ macro
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h6478 #define RCC_CCIPR_CLK48SEL_1 (0x2U << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x08000000 */ macro
Dstm32wb15xx.h6644 #define RCC_CCIPR_CLK48SEL_1 (0x2U << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x08000000 */ macro
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h7888 #define RCC_CCIPR_CLK48SEL_1 (0x2UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x08000000 */ macro
Dstm32g411xc.h8071 #define RCC_CCIPR_CLK48SEL_1 (0x2UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x08000000 */ macro
Dstm32g441xx.h8320 #define RCC_CCIPR_CLK48SEL_1 (0x2UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x08000000 */ macro
Dstm32gbk1cb.h8062 #define RCC_CCIPR_CLK48SEL_1 (0x2UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x08000000 */ macro
Dstm32g431xx.h8090 #define RCC_CCIPR_CLK48SEL_1 (0x2UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x08000000 */ macro
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h6397 #define RCC_CCIPR_CLK48SEL_1 (0x2UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x08000000 */ macro
Dstm32l412xx.h6172 #define RCC_CCIPR_CLK48SEL_1 (0x2UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x08000000 */ macro

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