| /hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/ |
| D | stm32u0xx_hal_rcc_ex.h | 348 #define RCC_USBCLKSOURCE_MSI RCC_CCIPR_CLK48SEL_0
360 #define RCC_RNGCLKSOURCE_MSI RCC_CCIPR_CLK48SEL_0
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| D | stm32u0xx_ll_rcc.h | 524 #define LL_RCC_USB_CLKSOURCE_MSI RCC_CCIPR_CLK48SEL_0 /*!< MSI clock used as USB clock so…
536 #define LL_RCC_RNG_CLKSOURCE_MSI RCC_CCIPR_CLK48SEL_0 /*!< MSI clock used as RNG clock so…
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| /hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/ |
| D | stm32l4xx_hal_rcc_ex.h | 595 #define RCC_SDMMC1CLKSOURCE_PLLSAI1 RCC_CCIPR_CLK48SEL_0 /*!< PLLSAI1 "Q" clock selected as …
615 #define RCC_RNGCLKSOURCE_PLLSAI1 RCC_CCIPR_CLK48SEL_0
633 #define RCC_USBCLKSOURCE_PLLSAI1 RCC_CCIPR_CLK48SEL_0
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| D | stm32l4xx_ll_rcc.h | 530 #define LL_RCC_SDMMC1_CLKSOURCE_PLLSAI1 RCC_CCIPR_CLK48SEL_0 /*!< PLLSAI1 clock used as SDMMC1 c…
548 #define LL_RCC_RNG_CLKSOURCE_PLLSAI1 RCC_CCIPR_CLK48SEL_0 /*!< PLLSAI1 clock used as RNG cloc…
566 #define LL_RCC_USB_CLKSOURCE_PLLSAI1 RCC_CCIPR_CLK48SEL_0 /*!< PLLSAI1 clock used as USB cloc…
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| /hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/ |
| D | stm32l4xx_hal_rcc_ex.c | 1309 case RCC_CCIPR_CLK48SEL_0: /* PLLSAI1 ? */ in HAL_RCCEx_GetPeriphCLKFreq()
1400 case RCC_CCIPR_CLK48SEL_0: /* PLLSAI1 ? */ in HAL_RCCEx_GetPeriphCLKFreq()
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| /hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/ |
| D | stm32wbxx_ll_rcc.h | 512 #define LL_RCC_CLK48_CLKSOURCE_PLLSAI1 RCC_CCIPR_CLK48SEL_0 /*!< PLLSAI1 selected as CLK48 clo…
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| /hal_stm32-latest/stm32cube/stm32u0xx/soc/ |
| D | stm32u031xx.h | 5623 #define RCC_CCIPR_CLK48SEL_0 (0x1UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x04000000 */ macro
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| D | stm32u083xx.h | 6497 #define RCC_CCIPR_CLK48SEL_0 (0x1UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x04000000 */ macro
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| D | stm32u073xx.h | 6230 #define RCC_CCIPR_CLK48SEL_0 (0x1UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x04000000 */ macro
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| /hal_stm32-latest/stm32cube/stm32wbxx/soc/ |
| D | stm32wb50xx.h | 6953 #define RCC_CCIPR_CLK48SEL_0 (0x1U << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x04000000 */ macro
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| D | stm32wb1mxx.h | 6643 #define RCC_CCIPR_CLK48SEL_0 (0x1U << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x04000000 */ macro
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| D | stm32wb30xx.h | 6952 #define RCC_CCIPR_CLK48SEL_0 (0x1U << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x04000000 */ macro
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| D | stm32wb35xx.h | 7909 #define RCC_CCIPR_CLK48SEL_0 (0x1U << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x04000000 */ macro
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| D | stm32wb55xx.h | 8136 #define RCC_CCIPR_CLK48SEL_0 (0x1U << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x04000000 */ macro
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| D | stm32wb5mxx.h | 8136 #define RCC_CCIPR_CLK48SEL_0 (0x1U << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x04000000 */ macro
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| /hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/ |
| D | stm32wb10xx.h | 6477 #define RCC_CCIPR_CLK48SEL_0 (0x1U << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x04000000 */ macro
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| D | stm32wb15xx.h | 6643 #define RCC_CCIPR_CLK48SEL_0 (0x1U << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x04000000 */ macro
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| /hal_stm32-latest/stm32cube/stm32g4xx/soc/ |
| D | stm32g411xb.h | 7887 #define RCC_CCIPR_CLK48SEL_0 (0x1UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x04000000 */ macro
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| D | stm32g411xc.h | 8070 #define RCC_CCIPR_CLK48SEL_0 (0x1UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x04000000 */ macro
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| D | stm32g441xx.h | 8319 #define RCC_CCIPR_CLK48SEL_0 (0x1UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x04000000 */ macro
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| D | stm32gbk1cb.h | 8061 #define RCC_CCIPR_CLK48SEL_0 (0x1UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x04000000 */ macro
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| D | stm32g431xx.h | 8089 #define RCC_CCIPR_CLK48SEL_0 (0x1UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x04000000 */ macro
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| D | stm32g4a1xx.h | 8721 #define RCC_CCIPR_CLK48SEL_0 (0x1UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x04000000 */ macro
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| /hal_stm32-latest/stm32cube/stm32l4xx/soc/ |
| D | stm32l422xx.h | 6396 #define RCC_CCIPR_CLK48SEL_0 (0x1UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x04000000 */ macro
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| D | stm32l412xx.h | 6171 #define RCC_CCIPR_CLK48SEL_0 (0x1UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x04000000 */ macro
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