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Searched refs:RCC_APBENR2_TIM17EN (Results 1 – 19 of 19) sorted by relevance

/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_hal_rcc.h984 SET_BIT(RCC->APBENR2, RCC_APBENR2_TIM17EN); \
986 … tmpreg = READ_BIT(RCC->APBENR2, RCC_APBENR2_TIM17EN); \
1004 #define __HAL_RCC_TIM17_CLK_DISABLE() CLEAR_BIT(RCC->APBENR2, RCC_APBENR2_TIM17EN)
1123 #define __HAL_RCC_TIM17_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_TIM17EN) != 0U)
1132 #define __HAL_RCC_TIM17_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_TIM17EN) == 0U)
Dstm32c0xx_ll_bus.h125 #define LL_APB1_GRP2_PERIPH_TIM17 RCC_APBENR2_TIM17EN
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_rcc.h1354 SET_BIT(RCC->APBENR2, RCC_APBENR2_TIM17EN); \
1356 … tmpreg = READ_BIT(RCC->APBENR2, RCC_APBENR2_TIM17EN); \
1448 #define __HAL_RCC_TIM17_CLK_DISABLE() CLEAR_BIT(RCC->APBENR2, RCC_APBENR2_TIM17EN)
1680 #define __HAL_RCC_TIM17_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_TIM17EN) != 0U)
1692 #define __HAL_RCC_TIM17_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_TIM17EN) == 0U)
Dstm32g0xx_ll_bus.h193 #define LL_APB2_GRP1_PERIPH_TIM17 RCC_APBENR2_TIM17EN
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h4128 #define RCC_APBENR2_TIM17EN RCC_APBENR2_TIM17EN_Msk macro
Dstm32c031xx.h4288 #define RCC_APBENR2_TIM17EN RCC_APBENR2_TIM17EN_Msk macro
Dstm32c071xx.h4756 #define RCC_APBENR2_TIM17EN RCC_APBENR2_TIM17EN_Msk macro
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h4364 #define RCC_APBENR2_TIM17EN RCC_APBENR2_TIM17EN_Msk macro
Dstm32g050xx.h4401 #define RCC_APBENR2_TIM17EN RCC_APBENR2_TIM17EN_Msk macro
Dstm32g070xx.h4542 #define RCC_APBENR2_TIM17EN RCC_APBENR2_TIM17EN_Msk macro
Dstm32g031xx.h4578 #define RCC_APBENR2_TIM17EN RCC_APBENR2_TIM17EN_Msk macro
Dstm32g041xx.h4826 #define RCC_APBENR2_TIM17EN RCC_APBENR2_TIM17EN_Msk macro
Dstm32g051xx.h4938 #define RCC_APBENR2_TIM17EN RCC_APBENR2_TIM17EN_Msk macro
Dstm32g061xx.h5186 #define RCC_APBENR2_TIM17EN RCC_APBENR2_TIM17EN_Msk macro
Dstm32g071xx.h5303 #define RCC_APBENR2_TIM17EN RCC_APBENR2_TIM17EN_Msk macro
Dstm32g081xx.h5551 #define RCC_APBENR2_TIM17EN RCC_APBENR2_TIM17EN_Msk macro
Dstm32g0b0xx.h5591 #define RCC_APBENR2_TIM17EN RCC_APBENR2_TIM17EN_Msk macro
Dstm32g0c1xx.h6909 #define RCC_APBENR2_TIM17EN RCC_APBENR2_TIM17EN_Msk macro
Dstm32g0b1xx.h6661 #define RCC_APBENR2_TIM17EN RCC_APBENR2_TIM17EN_Msk macro