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Searched refs:RCC_APBENR2_TIM15EN (Results 1 – 16 of 16) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_hal_rcc.h1183 SET_BIT(RCC->APBENR2, RCC_APBENR2_TIM15EN); \
1185 … tmpreg = READ_BIT(RCC->APBENR2, RCC_APBENR2_TIM15EN); \
1217 #define __HAL_RCC_TIM15_CLK_DISABLE() CLEAR_BIT(RCC->APBENR2, RCC_APBENR2_TIM15EN)
1428 #define __HAL_RCC_TIM15_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_TIM15EN) != 0U)
1446 #define __HAL_RCC_TIM15_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_TIM15EN) == 0U)
Dstm32u0xx_ll_bus.h150 #define LL_APB1_GRP2_PERIPH_TIM15 RCC_APBENR2_TIM15EN
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_rcc.h1337 SET_BIT(RCC->APBENR2, RCC_APBENR2_TIM15EN); \
1339 … tmpreg = READ_BIT(RCC->APBENR2, RCC_APBENR2_TIM15EN); \
1445 #define __HAL_RCC_TIM15_CLK_DISABLE() CLEAR_BIT(RCC->APBENR2, RCC_APBENR2_TIM15EN)
1677 #define __HAL_RCC_TIM15_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_TIM15EN) != 0U)
1689 #define __HAL_RCC_TIM15_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_TIM15EN) == 0U)
Dstm32g0xx_ll_bus.h187 #define LL_APB2_GRP1_PERIPH_TIM15 RCC_APBENR2_TIM15EN
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g050xx.h4395 #define RCC_APBENR2_TIM15EN RCC_APBENR2_TIM15EN_Msk macro
Dstm32g070xx.h4536 #define RCC_APBENR2_TIM15EN RCC_APBENR2_TIM15EN_Msk macro
Dstm32g051xx.h4932 #define RCC_APBENR2_TIM15EN RCC_APBENR2_TIM15EN_Msk macro
Dstm32g061xx.h5180 #define RCC_APBENR2_TIM15EN RCC_APBENR2_TIM15EN_Msk macro
Dstm32g071xx.h5297 #define RCC_APBENR2_TIM15EN RCC_APBENR2_TIM15EN_Msk macro
Dstm32g081xx.h5545 #define RCC_APBENR2_TIM15EN RCC_APBENR2_TIM15EN_Msk macro
Dstm32g0b0xx.h5585 #define RCC_APBENR2_TIM15EN RCC_APBENR2_TIM15EN_Msk macro
Dstm32g0c1xx.h6903 #define RCC_APBENR2_TIM15EN RCC_APBENR2_TIM15EN_Msk macro
Dstm32g0b1xx.h6655 #define RCC_APBENR2_TIM15EN RCC_APBENR2_TIM15EN_Msk macro
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h5443 #define RCC_APBENR2_TIM15EN RCC_APBENR2_TIM15EN_Msk macro
Dstm32u083xx.h6277 #define RCC_APBENR2_TIM15EN RCC_APBENR2_TIM15EN_Msk macro
Dstm32u073xx.h6013 #define RCC_APBENR2_TIM15EN RCC_APBENR2_TIM15EN_Msk macro