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Searched refs:RCC_APBENR1_TIM7EN (Results 1 – 16 of 16) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_hal_rcc.h881 SET_BIT(RCC->APBENR1, RCC_APBENR1_TIM7EN); \
883 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM7EN); \
1079 #define __HAL_RCC_TIM7_CLK_DISABLE() CLEAR_BIT(RCC->APBENR1, RCC_APBENR1_TIM7EN)
1288 #define __HAL_RCC_TIM7_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM7EN) != 0…
1350 #define __HAL_RCC_TIM7_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM7EN) == 0…
Dstm32u0xx_ll_bus.h104 #define LL_APB1_GRP1_PERIPH_TIM7 RCC_APBENR1_TIM7EN
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_rcc.h1047 SET_BIT(RCC->APBENR1, RCC_APBENR1_TIM7EN); \
1049 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM7EN); \
1379 #define __HAL_RCC_TIM7_CLK_DISABLE() CLEAR_BIT(RCC->APBENR1, RCC_APBENR1_TIM7EN)
1538 #define __HAL_RCC_TIM7_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM7EN) != 0U)
1602 #define __HAL_RCC_TIM7_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM7EN) == 0U)
Dstm32g0xx_ll_bus.h110 #define LL_APB1_GRP1_PERIPH_TIM7 RCC_APBENR1_TIM7EN
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g050xx.h4351 #define RCC_APBENR1_TIM7EN RCC_APBENR1_TIM7EN_Msk macro
Dstm32g070xx.h4486 #define RCC_APBENR1_TIM7EN RCC_APBENR1_TIM7EN_Msk macro
Dstm32g051xx.h4876 #define RCC_APBENR1_TIM7EN RCC_APBENR1_TIM7EN_Msk macro
Dstm32g061xx.h5124 #define RCC_APBENR1_TIM7EN RCC_APBENR1_TIM7EN_Msk macro
Dstm32g071xx.h5226 #define RCC_APBENR1_TIM7EN RCC_APBENR1_TIM7EN_Msk macro
Dstm32g081xx.h5474 #define RCC_APBENR1_TIM7EN RCC_APBENR1_TIM7EN_Msk macro
Dstm32g0b0xx.h5520 #define RCC_APBENR1_TIM7EN RCC_APBENR1_TIM7EN_Msk macro
Dstm32g0c1xx.h6808 #define RCC_APBENR1_TIM7EN RCC_APBENR1_TIM7EN_Msk macro
Dstm32g0b1xx.h6560 #define RCC_APBENR1_TIM7EN RCC_APBENR1_TIM7EN_Msk macro
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h5378 #define RCC_APBENR1_TIM7EN RCC_APBENR1_TIM7EN_Msk macro
Dstm32u083xx.h6191 #define RCC_APBENR1_TIM7EN RCC_APBENR1_TIM7EN_Msk macro
Dstm32u073xx.h5927 #define RCC_APBENR1_TIM7EN RCC_APBENR1_TIM7EN_Msk macro