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Searched refs:RCC_APBENR1_TIM6EN (Results 1 – 16 of 16) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_hal_rcc.h873 SET_BIT(RCC->APBENR1, RCC_APBENR1_TIM6EN); \
875 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM6EN); \
1077 #define __HAL_RCC_TIM6_CLK_DISABLE() CLEAR_BIT(RCC->APBENR1, RCC_APBENR1_TIM6EN)
1286 #define __HAL_RCC_TIM6_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM6EN) != 0…
1348 #define __HAL_RCC_TIM6_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM6EN) == 0…
Dstm32u0xx_ll_bus.h103 #define LL_APB1_GRP1_PERIPH_TIM6 RCC_APBENR1_TIM6EN
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_rcc.h1039 SET_BIT(RCC->APBENR1, RCC_APBENR1_TIM6EN); \
1041 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM6EN); \
1376 #define __HAL_RCC_TIM6_CLK_DISABLE() CLEAR_BIT(RCC->APBENR1, RCC_APBENR1_TIM6EN)
1537 #define __HAL_RCC_TIM6_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM6EN) != 0U)
1601 #define __HAL_RCC_TIM6_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM6EN) == 0U)
Dstm32g0xx_ll_bus.h107 #define LL_APB1_GRP1_PERIPH_TIM6 RCC_APBENR1_TIM6EN
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g050xx.h4348 #define RCC_APBENR1_TIM6EN RCC_APBENR1_TIM6EN_Msk macro
Dstm32g070xx.h4483 #define RCC_APBENR1_TIM6EN RCC_APBENR1_TIM6EN_Msk macro
Dstm32g051xx.h4873 #define RCC_APBENR1_TIM6EN RCC_APBENR1_TIM6EN_Msk macro
Dstm32g061xx.h5121 #define RCC_APBENR1_TIM6EN RCC_APBENR1_TIM6EN_Msk macro
Dstm32g071xx.h5223 #define RCC_APBENR1_TIM6EN RCC_APBENR1_TIM6EN_Msk macro
Dstm32g081xx.h5471 #define RCC_APBENR1_TIM6EN RCC_APBENR1_TIM6EN_Msk macro
Dstm32g0b0xx.h5517 #define RCC_APBENR1_TIM6EN RCC_APBENR1_TIM6EN_Msk macro
Dstm32g0c1xx.h6805 #define RCC_APBENR1_TIM6EN RCC_APBENR1_TIM6EN_Msk macro
Dstm32g0b1xx.h6557 #define RCC_APBENR1_TIM6EN RCC_APBENR1_TIM6EN_Msk macro
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h5375 #define RCC_APBENR1_TIM6EN RCC_APBENR1_TIM6EN_Msk macro
Dstm32u083xx.h6188 #define RCC_APBENR1_TIM6EN RCC_APBENR1_TIM6EN_Msk macro
Dstm32u073xx.h5924 #define RCC_APBENR1_TIM6EN RCC_APBENR1_TIM6EN_Msk macro