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Searched refs:RCC_APB2ENR_SDIOEN (Results 1 – 25 of 33) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_hal_rcc_ex.h1568 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SDIOEN);\
1570 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SDIOEN);\
1587 #define __HAL_RCC_SDIO_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SDIOEN))
1637 #define __HAL_RCC_SDIO_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SDIOEN)) != RESET)
1641 #define __HAL_RCC_SDIO_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SDIOEN)) == RESET)
2556 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SDIOEN);\
2558 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SDIOEN);\
2576 #define __HAL_RCC_SDIO_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SDIOEN))
2593 #define __HAL_RCC_SDIO_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SDIOEN)) != RESET)
2600 #define __HAL_RCC_SDIO_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SDIOEN)) == RESET)
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Dstm32f4xx_ll_bus.h296 #define LL_APB2_GRP1_PERIPH_SDIO RCC_APB2ENR_SDIOEN
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_hal_rcc_ex.h336 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SDIOEN);\
338 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SDIOEN);\
341 #define __HAL_RCC_SDIO_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SDIOEN))
716 #define __HAL_RCC_SDIO_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SDIOEN)) != 0U)
717 #define __HAL_RCC_SDIO_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SDIOEN)) == 0U)
Dstm32l1xx_ll_bus.h156 #define LL_APB2_GRP1_PERIPH_SDIO RCC_APB2ENR_SDIOEN
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_hal_rcc.h959 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SDIOEN);\
961 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SDIOEN);\
1007 #define __HAL_RCC_SDIO_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SDIOEN))
1031 #define __HAL_RCC_SDIO_IS_CLK_ENABLED() ((RCC->APB2ENR &(RCC_APB2ENR_SDIOEN))!= RESET)
1045 #define __HAL_RCC_SDIO_IS_CLK_DISABLED() ((RCC->APB2ENR &(RCC_APB2ENR_SDIOEN))== RESET)
Dstm32f2xx_ll_bus.h168 #define LL_APB2_GRP1_PERIPH_SDIO RCC_APB2ENR_SDIOEN
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f401xc.h4355 #define RCC_APB2ENR_SDIOEN RCC_APB2ENR_SDIOEN_Msk macro
Dstm32f401xe.h4355 #define RCC_APB2ENR_SDIOEN RCC_APB2ENR_SDIOEN_Msk macro
Dstm32f411xe.h4367 #define RCC_APB2ENR_SDIOEN RCC_APB2ENR_SDIOEN_Msk macro
Dstm32f405xx.h9748 #define RCC_APB2ENR_SDIOEN RCC_APB2ENR_SDIOEN_Msk macro
Dstm32f412cx.h8840 #define RCC_APB2ENR_SDIOEN RCC_APB2ENR_SDIOEN_Msk macro
Dstm32f415xx.h10027 #define RCC_APB2ENR_SDIOEN RCC_APB2ENR_SDIOEN_Msk macro
Dstm32f423xx.h10154 #define RCC_APB2ENR_SDIOEN RCC_APB2ENR_SDIOEN_Msk macro
Dstm32f407xx.h10069 #define RCC_APB2ENR_SDIOEN RCC_APB2ENR_SDIOEN_Msk macro
Dstm32f412zx.h9818 #define RCC_APB2ENR_SDIOEN RCC_APB2ENR_SDIOEN_Msk macro
Dstm32f412rx.h9794 #define RCC_APB2ENR_SDIOEN RCC_APB2ENR_SDIOEN_Msk macro
Dstm32f412vx.h9802 #define RCC_APB2ENR_SDIOEN RCC_APB2ENR_SDIOEN_Msk macro
Dstm32f413xx.h10112 #define RCC_APB2ENR_SDIOEN RCC_APB2ENR_SDIOEN_Msk macro
/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dstm32l151xd.h4824 #define RCC_APB2ENR_SDIOEN RCC_APB2ENR_SDIOEN_Msk /*!< SDIO clock enab… macro
Dstm32l152xd.h4960 #define RCC_APB2ENR_SDIOEN RCC_APB2ENR_SDIOEN_Msk /*!< SDIO clock enab… macro
Dstm32l162xd.h5096 #define RCC_APB2ENR_SDIOEN RCC_APB2ENR_SDIOEN_Msk /*!< SDIO clock enab… macro
/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h9591 #define RCC_APB2ENR_SDIOEN RCC_APB2ENR_SDIOEN_Msk macro
Dstm32f205xx.h9342 #define RCC_APB2ENR_SDIOEN RCC_APB2ENR_SDIOEN_Msk macro
Dstm32f207xx.h9662 #define RCC_APB2ENR_SDIOEN RCC_APB2ENR_SDIOEN_Msk macro
Dstm32f217xx.h9911 #define RCC_APB2ENR_SDIOEN RCC_APB2ENR_SDIOEN_Msk macro

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