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Searched refs:RCC_APB1ENR1_TIM7EN (Results 1 – 25 of 66) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_hal_rcc.h861 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN); \
863 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN); \
1039 #define __HAL_RCC_TIM7_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN)
1412 #define __HAL_RCC_TIM7_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN) != 0U)
1472 #define __HAL_RCC_TIM7_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN) == 0U)
Dstm32g4xx_ll_bus.h143 #define LL_APB1_GRP1_PERIPH_TIM7 RCC_APB1ENR1_TIM7EN
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_rcc.h979 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN); \
981 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN); \
1182 #define __HAL_RCC_TIM7_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN)
1505 #define __HAL_RCC_TIM7_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN) != 0U)
1562 #define __HAL_RCC_TIM7_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN) == 0U)
Dstm32l5xx_ll_bus.h131 #define LL_APB1_GRP1_PERIPH_TIM7 RCC_APB1ENR1_TIM7EN
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_rcc.h1114 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN); \
1116 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN); \
1361 #define __HAL_RCC_TIM7_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN)
1905 #define __HAL_RCC_TIM7_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN) != 0U)
2004 #define __HAL_RCC_TIM7_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN) == 0U)
Dstm32l4xx_ll_bus.h181 #define LL_APB1_GRP1_PERIPH_TIM7 RCC_APB1ENR1_TIM7EN
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_rcc.h1498 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN); \
1500 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN); \
1653 #define __HAL_RCC_TIM7_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN)
2355 #define __HAL_RCC_TIM7_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN) != 0U)
2409 #define __HAL_RCC_TIM7_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN) == 0U)
Dstm32u5xx_ll_bus.h220 #define LL_APB1_GRP1_PERIPH_TIM7 RCC_APB1ENR1_TIM7EN
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_bus.h167 #define LL_APB1_GRP1_PERIPH_TIM7 RCC_APB1ENR1_TIM7EN
Dstm32h7rsxx_hal_rcc.h1383 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN);\
1583 #define __HAL_RCC_TIM7_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN)
2087 #define __HAL_RCC_TIM7_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN) != 0U)
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_bus.h257 #define LL_APB1_GRP1_PERIPH_TIM7 RCC_APB1ENR1_TIM7EN
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h7609 #define RCC_APB1ENR1_TIM7EN RCC_APB1ENR1_TIM7EN_Msk macro
Dstm32g411xc.h7783 #define RCC_APB1ENR1_TIM7EN RCC_APB1ENR1_TIM7EN_Msk macro
Dstm32g441xx.h7987 #define RCC_APB1ENR1_TIM7EN RCC_APB1ENR1_TIM7EN_Msk macro
Dstm32gbk1cb.h7743 #define RCC_APB1ENR1_TIM7EN RCC_APB1ENR1_TIM7EN_Msk macro
Dstm32g431xx.h7760 #define RCC_APB1ENR1_TIM7EN RCC_APB1ENR1_TIM7EN_Msk macro
Dstm32g4a1xx.h8366 #define RCC_APB1ENR1_TIM7EN RCC_APB1ENR1_TIM7EN_Msk macro
Dstm32g491xx.h8139 #define RCC_APB1ENR1_TIM7EN RCC_APB1ENR1_TIM7EN_Msk macro
Dstm32g473xx.h8832 #define RCC_APB1ENR1_TIM7EN RCC_APB1ENR1_TIM7EN_Msk macro
Dstm32g471xx.h8294 #define RCC_APB1ENR1_TIM7EN RCC_APB1ENR1_TIM7EN_Msk macro
Dstm32g483xx.h9059 #define RCC_APB1ENR1_TIM7EN RCC_APB1ENR1_TIM7EN_Msk macro
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l433xx.h9897 #define RCC_APB1ENR1_TIM7EN RCC_APB1ENR1_TIM7EN_Msk macro
Dstm32l442xx.h9661 #define RCC_APB1ENR1_TIM7EN RCC_APB1ENR1_TIM7EN_Msk macro
Dstm32l431xx.h9799 #define RCC_APB1ENR1_TIM7EN RCC_APB1ENR1_TIM7EN_Msk macro
Dstm32l432xx.h9439 #define RCC_APB1ENR1_TIM7EN RCC_APB1ENR1_TIM7EN_Msk macro

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