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Searched refs:RCC_AHBENR_DMAEN (Results 1 – 25 of 40) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wb0x/drivers/include/
Dstm32wb0x_ll_bus.h75 #define LL_AHB1_GRP1_PERIPH_ALL (RCC_AHBENR_DMAEN| \
81 #define LL_AHB1_GRP1_PERIPH_DMA RCC_AHBENR_DMAEN
/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f030x6.h3050 #define RCC_AHBENR_DMAEN RCC_AHBENR_DMAEN_Msk /*!< DMA1 clock enab… macro
3077 #define RCC_AHBENR_DMA1EN RCC_AHBENR_DMAEN /*!< DMA1 clock enable */
Dstm32f030x8.h3079 #define RCC_AHBENR_DMAEN RCC_AHBENR_DMAEN_Msk /*!< DMA1 clock enab… macro
3106 #define RCC_AHBENR_DMA1EN RCC_AHBENR_DMAEN /*!< DMA1 clock enable */
Dstm32f070x6.h3116 #define RCC_AHBENR_DMAEN RCC_AHBENR_DMAEN_Msk /*!< DMA1 clock enab… macro
3143 #define RCC_AHBENR_DMA1EN RCC_AHBENR_DMAEN /*!< DMA1 clock enable */
Dstm32f031x6.h3179 #define RCC_AHBENR_DMAEN RCC_AHBENR_DMAEN_Msk /*!< DMA1 clock enab… macro
3203 #define RCC_AHBENR_DMA1EN RCC_AHBENR_DMAEN /*!< DMA1 clock enable */
Dstm32f030xc.h3367 #define RCC_AHBENR_DMAEN RCC_AHBENR_DMAEN_Msk /*!< DMA1 clock enab… macro
3394 #define RCC_AHBENR_DMA1EN RCC_AHBENR_DMAEN /*!< DMA1 clock enable */
Dstm32f038xx.h3154 #define RCC_AHBENR_DMAEN RCC_AHBENR_DMAEN_Msk /*!< DMA1 clock enab… macro
3178 #define RCC_AHBENR_DMA1EN RCC_AHBENR_DMAEN /*!< DMA1 clock enable */
Dstm32f070xb.h3229 #define RCC_AHBENR_DMAEN RCC_AHBENR_DMAEN_Msk /*!< DMA1 clock enab… macro
3256 #define RCC_AHBENR_DMA1EN RCC_AHBENR_DMAEN /*!< DMA1 clock enable */
Dstm32f058xx.h3608 #define RCC_AHBENR_DMAEN RCC_AHBENR_DMAEN_Msk /*!< DMA1 clock enab… macro
3638 #define RCC_AHBENR_DMA1EN RCC_AHBENR_DMAEN /*!< DMA1 clock enable */
Dstm32f051x8.h3633 #define RCC_AHBENR_DMAEN RCC_AHBENR_DMAEN_Msk /*!< DMA1 clock enab… macro
3663 #define RCC_AHBENR_DMA1EN RCC_AHBENR_DMAEN /*!< DMA1 clock enable */
Dstm32f071xb.h4070 #define RCC_AHBENR_DMAEN RCC_AHBENR_DMAEN_Msk /*!< DMA1 clock enab… macro
4103 #define RCC_AHBENR_DMA1EN RCC_AHBENR_DMAEN /*!< DMA1 clock enable */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l041xx.h3750 #define RCC_AHBENR_DMAEN RCC_AHBENR_DMAEN_Msk /*!< DMA1 clock enab… macro
3762 #define RCC_AHBENR_DMA1EN RCC_AHBENR_DMAEN /*!< DMA1 clock enable */
Dstm32l010x8.h3455 #define RCC_AHBENR_DMAEN RCC_AHBENR_DMAEN_Msk /*!< DMA1 clock enab… macro
3464 #define RCC_AHBENR_DMA1EN RCC_AHBENR_DMAEN /*!< DMA1 clock enable */
Dstm32l010xb.h3474 #define RCC_AHBENR_DMAEN RCC_AHBENR_DMAEN_Msk /*!< DMA1 clock enab… macro
3483 #define RCC_AHBENR_DMA1EN RCC_AHBENR_DMAEN /*!< DMA1 clock enable */
Dstm32l011xx.h3528 #define RCC_AHBENR_DMAEN RCC_AHBENR_DMAEN_Msk /*!< DMA1 clock enab… macro
3537 #define RCC_AHBENR_DMA1EN RCC_AHBENR_DMAEN /*!< DMA1 clock enable */
Dstm32l021xx.h3659 #define RCC_AHBENR_DMAEN RCC_AHBENR_DMAEN_Msk /*!< DMA1 clock enab… macro
3671 #define RCC_AHBENR_DMA1EN RCC_AHBENR_DMAEN /*!< DMA1 clock enable */
Dstm32l031xx.h3619 #define RCC_AHBENR_DMAEN RCC_AHBENR_DMAEN_Msk /*!< DMA1 clock enab… macro
3628 #define RCC_AHBENR_DMA1EN RCC_AHBENR_DMAEN /*!< DMA1 clock enable */
Dstm32l051xx.h3711 #define RCC_AHBENR_DMAEN RCC_AHBENR_DMAEN_Msk /*!< DMA1 clock enab… macro
3720 #define RCC_AHBENR_DMA1EN RCC_AHBENR_DMAEN /*!< DMA1 clock enable */
Dstm32l010x4.h3419 #define RCC_AHBENR_DMAEN RCC_AHBENR_DMAEN_Msk /*!< DMA1 clock enab… macro
3428 #define RCC_AHBENR_DMA1EN RCC_AHBENR_DMAEN /*!< DMA1 clock enable */
Dstm32l010x6.h3448 #define RCC_AHBENR_DMAEN RCC_AHBENR_DMAEN_Msk /*!< DMA1 clock enab… macro
3457 #define RCC_AHBENR_DMA1EN RCC_AHBENR_DMAEN /*!< DMA1 clock enable */
Dstm32l081xx.h3917 #define RCC_AHBENR_DMAEN RCC_AHBENR_DMAEN_Msk /*!< DMA1 clock enab… macro
3929 #define RCC_AHBENR_DMA1EN RCC_AHBENR_DMAEN /*!< DMA1 clock enable */
Dstm32l071xx.h3786 #define RCC_AHBENR_DMAEN RCC_AHBENR_DMAEN_Msk /*!< DMA1 clock enab… macro
3795 #define RCC_AHBENR_DMA1EN RCC_AHBENR_DMAEN /*!< DMA1 clock enable */
Dstm32l052xx.h4036 #define RCC_AHBENR_DMAEN RCC_AHBENR_DMAEN_Msk /*!< DMA1 clock enab… macro
4051 #define RCC_AHBENR_DMA1EN RCC_AHBENR_DMAEN /*!< DMA1 clock enable */
Dstm32l062xx.h4167 #define RCC_AHBENR_DMAEN RCC_AHBENR_DMAEN_Msk /*!< DMA1 clock enab… macro
4185 #define RCC_AHBENR_DMA1EN RCC_AHBENR_DMAEN /*!< DMA1 clock enable */
Dstm32l053xx.h4183 #define RCC_AHBENR_DMAEN RCC_AHBENR_DMAEN_Msk /*!< DMA1 clock enab… macro
4198 #define RCC_AHBENR_DMA1EN RCC_AHBENR_DMAEN /*!< DMA1 clock enable */

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