Home
last modified time | relevance | path

Searched refs:QSPI_BASE (Results 1 – 25 of 48) sorted by relevance

12

/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h844 #define QSPI_BASE (0x90000000UL) /*!< QUADSPI memories accessible over AHB base address… macro
Dstm32l412xx.h811 #define QSPI_BASE (0x90000000UL) /*!< QUADSPI memories accessible over AHB base address… macro
Dstm32l433xx.h978 #define QSPI_BASE (0x90000000UL) /*!< QUADSPI memories accessible over AHB base address… macro
Dstm32l451xx.h944 #define QSPI_BASE (0x90000000UL) /*!< QUADSPI memories accessible over AHB base address… macro
Dstm32l442xx.h953 #define QSPI_BASE (0x90000000UL) /*!< QUADSPI memories accessible over AHB base address… macro
Dstm32l431xx.h924 #define QSPI_BASE (0x90000000UL) /*!< QUADSPI memories accessible over AHB base address… macro
Dstm32l432xx.h920 #define QSPI_BASE (0x90000000UL) /*!< QUADSPI memories accessible over AHB base address… macro
Dstm32l443xx.h1011 #define QSPI_BASE (0x90000000UL) /*!< QUADSPI memories accessible over AHB base address… macro
Dstm32l471xx.h1000 #define QSPI_BASE (0x90000000UL) /*!< QUADSPI memories accessible over AHB base address… macro
Dstm32l452xx.h983 #define QSPI_BASE (0x90000000UL) /*!< QUADSPI memories accessible over AHB base address… macro
Dstm32l462xx.h1016 #define QSPI_BASE (0x90000000UL) /*!< QUADSPI memories accessible over AHB base address… macro
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g4a1xx.h1007 #define QSPI_BASE (0x90000000UL) /*!< QUADSPI memories accessible over AHB base address… macro
Dstm32g491xx.h975 #define QSPI_BASE (0x90000000UL) /*!< QUADSPI memories accessible over AHB base address… macro
Dstm32g473xx.h1024 #define QSPI_BASE (0x90000000UL) /*!< QUADSPI memories accessible over AHB base address… macro
Dstm32g471xx.h984 #define QSPI_BASE (0x90000000UL) /*!< QUADSPI memories accessible over AHB base address… macro
Dstm32g483xx.h1056 #define QSPI_BASE (0x90000000UL) /*!< QUADSPI memories accessible over AHB base address… macro
Dstm32g474xx.h1138 #define QSPI_BASE (0x90000000UL) /*!< QUADSPI memories accessible over AHB base address… macro
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h938 #define QSPI_BASE 0x90000000UL /*!< Base address of : QSPI memories accessible over A… macro
Dstm32f722xx.h924 #define QSPI_BASE 0x90000000UL /*!< Base address of : QSPI memories accessible over A… macro
Dstm32f730xx.h970 #define QSPI_BASE 0x90000000UL /*!< Base address of : QSPI memories accessible over A… macro
Dstm32f733xx.h970 #define QSPI_BASE 0x90000000UL /*!< Base address of : QSPI memories accessible over A… macro
Dstm32f732xx.h956 #define QSPI_BASE 0x90000000UL /*!< Base address of : QSPI memories accessible over A… macro
Dstm32f750xx.h1203 #define QSPI_BASE 0x90000000UL /*!< Base address of : QSPI memories accessible over A… macro
Dstm32f745xx.h1085 #define QSPI_BASE 0x90000000UL /*!< Base address of : QSPI memories accessible over A… macro
Dstm32f756xx.h1203 #define QSPI_BASE 0x90000000UL /*!< Base address of : QSPI memories accessible over A… macro

12