Home
last modified time | relevance | path

Searched refs:PWR_CR2_PVME3_Pos (Results 1 – 25 of 56) sorted by relevance

123

/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h5347 #define PWR_CR2_PVME3_Pos (6U) macro
5348 #define PWR_CR2_PVME3_Msk (0x1UL << PWR_CR2_PVME3_Pos) /*!< 0x00000040 */
Dstm32wle5xx.h5347 #define PWR_CR2_PVME3_Pos (6U) macro
5348 #define PWR_CR2_PVME3_Msk (0x1UL << PWR_CR2_PVME3_Pos) /*!< 0x00000040 */
Dstm32wl5mxx.h6115 #define PWR_CR2_PVME3_Pos (6U) macro
6116 #define PWR_CR2_PVME3_Msk (0x1UL << PWR_CR2_PVME3_Pos) /*!< 0x00000040 */
Dstm32wl54xx.h6115 #define PWR_CR2_PVME3_Pos (6U) macro
6116 #define PWR_CR2_PVME3_Msk (0x1UL << PWR_CR2_PVME3_Pos) /*!< 0x00000040 */
Dstm32wl55xx.h6115 #define PWR_CR2_PVME3_Pos (6U) macro
6116 #define PWR_CR2_PVME3_Msk (0x1UL << PWR_CR2_PVME3_Pos) /*!< 0x00000040 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h4395 #define PWR_CR2_PVME3_Pos (5U) macro
4396 #define PWR_CR2_PVME3_Msk (0x1UL << PWR_CR2_PVME3_Pos) /*!< 0x00000020 */
Dstm32u083xx.h5055 #define PWR_CR2_PVME3_Pos (5U) macro
5056 #define PWR_CR2_PVME3_Msk (0x1UL << PWR_CR2_PVME3_Pos) /*!< 0x00000020 */
Dstm32u073xx.h4797 #define PWR_CR2_PVME3_Pos (5U) macro
4798 #define PWR_CR2_PVME3_Msk (0x1UL << PWR_CR2_PVME3_Pos) /*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb50xx.h5871 #define PWR_CR2_PVME3_Pos (6U) macro
5872 #define PWR_CR2_PVME3_Msk (0x1UL << PWR_CR2_PVME3_Pos) /*!< 0x00000040 */
Dstm32wb1mxx.h5528 #define PWR_CR2_PVME3_Pos (6U) macro
5529 #define PWR_CR2_PVME3_Msk (0x1UL << PWR_CR2_PVME3_Pos) /*!< 0x00000040 */
Dstm32wb30xx.h5870 #define PWR_CR2_PVME3_Pos (6U) macro
5871 #define PWR_CR2_PVME3_Msk (0x1UL << PWR_CR2_PVME3_Pos) /*!< 0x00000040 */
Dstm32wb35xx.h6257 #define PWR_CR2_PVME3_Pos (6U) macro
6258 #define PWR_CR2_PVME3_Msk (0x1UL << PWR_CR2_PVME3_Pos) /*!< 0x00000040 */
Dstm32wb55xx.h6309 #define PWR_CR2_PVME3_Pos (6U) macro
6310 #define PWR_CR2_PVME3_Msk (0x1UL << PWR_CR2_PVME3_Pos) /*!< 0x00000040 */
Dstm32wb5mxx.h6309 #define PWR_CR2_PVME3_Pos (6U) macro
6310 #define PWR_CR2_PVME3_Msk (0x1UL << PWR_CR2_PVME3_Pos) /*!< 0x00000040 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h5432 #define PWR_CR2_PVME3_Pos (6U) macro
5433 #define PWR_CR2_PVME3_Msk (0x1UL << PWR_CR2_PVME3_Pos) /*!< 0x00000040 */
Dstm32wb15xx.h5528 #define PWR_CR2_PVME3_Pos (6U) macro
5529 #define PWR_CR2_PVME3_Msk (0x1UL << PWR_CR2_PVME3_Pos) /*!< 0x00000040 */
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h6319 #define PWR_CR2_PVME3_Pos (6U) macro
6320 #define PWR_CR2_PVME3_Msk (0x1UL << PWR_CR2_PVME3_Pos) /*!< 0x00000040 */
Dstm32g411xc.h6484 #define PWR_CR2_PVME3_Pos (6U) macro
6485 #define PWR_CR2_PVME3_Msk (0x1UL << PWR_CR2_PVME3_Pos) /*!< 0x00000040 */
Dstm32g441xx.h6667 #define PWR_CR2_PVME3_Pos (6U) macro
6668 #define PWR_CR2_PVME3_Msk (0x1UL << PWR_CR2_PVME3_Pos) /*!< 0x00000040 */
Dstm32gbk1cb.h6432 #define PWR_CR2_PVME3_Pos (6U) macro
6433 #define PWR_CR2_PVME3_Msk (0x1UL << PWR_CR2_PVME3_Pos) /*!< 0x00000040 */
Dstm32g431xx.h6446 #define PWR_CR2_PVME3_Pos (6U) macro
6447 #define PWR_CR2_PVME3_Msk (0x1UL << PWR_CR2_PVME3_Pos) /*!< 0x00000040 */
Dstm32g4a1xx.h6831 #define PWR_CR2_PVME3_Pos (6U) macro
6832 #define PWR_CR2_PVME3_Msk (0x1UL << PWR_CR2_PVME3_Pos) /*!< 0x00000040 */
Dstm32g491xx.h6610 #define PWR_CR2_PVME3_Pos (6U) macro
6611 #define PWR_CR2_PVME3_Msk (0x1UL << PWR_CR2_PVME3_Pos) /*!< 0x00000040 */
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h5010 #define PWR_CR2_PVME3_Pos (6U) macro
5011 #define PWR_CR2_PVME3_Msk (0x1UL << PWR_CR2_PVME3_Pos) /*!< 0x00000040 */
Dstm32l412xx.h4794 #define PWR_CR2_PVME3_Pos (6U) macro
4795 #define PWR_CR2_PVME3_Msk (0x1UL << PWR_CR2_PVME3_Pos) /*!< 0x00000040 */

123