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Searched refs:PWR_CR2_PLS_Pos (Results 1 – 25 of 56) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h5340 #define PWR_CR2_PLS_Pos (1U) macro
5341 #define PWR_CR2_PLS_Msk (0x7UL << PWR_CR2_PLS_Pos) /*!< 0x0000000E */
5343 #define PWR_CR2_PLS_0 (0x1UL << PWR_CR2_PLS_Pos) /*!< 0x00000002 */
5344 #define PWR_CR2_PLS_1 (0x2UL << PWR_CR2_PLS_Pos) /*!< 0x00000004 */
5345 #define PWR_CR2_PLS_2 (0x4UL << PWR_CR2_PLS_Pos) /*!< 0x00000008 */
Dstm32wle5xx.h5340 #define PWR_CR2_PLS_Pos (1U) macro
5341 #define PWR_CR2_PLS_Msk (0x7UL << PWR_CR2_PLS_Pos) /*!< 0x0000000E */
5343 #define PWR_CR2_PLS_0 (0x1UL << PWR_CR2_PLS_Pos) /*!< 0x00000002 */
5344 #define PWR_CR2_PLS_1 (0x2UL << PWR_CR2_PLS_Pos) /*!< 0x00000004 */
5345 #define PWR_CR2_PLS_2 (0x4UL << PWR_CR2_PLS_Pos) /*!< 0x00000008 */
Dstm32wl5mxx.h6108 #define PWR_CR2_PLS_Pos (1U) macro
6109 #define PWR_CR2_PLS_Msk (0x7UL << PWR_CR2_PLS_Pos) /*!< 0x0000000E */
6111 #define PWR_CR2_PLS_0 (0x1UL << PWR_CR2_PLS_Pos) /*!< 0x00000002 */
6112 #define PWR_CR2_PLS_1 (0x2UL << PWR_CR2_PLS_Pos) /*!< 0x00000004 */
6113 #define PWR_CR2_PLS_2 (0x4UL << PWR_CR2_PLS_Pos) /*!< 0x00000008 */
Dstm32wl54xx.h6108 #define PWR_CR2_PLS_Pos (1U) macro
6109 #define PWR_CR2_PLS_Msk (0x7UL << PWR_CR2_PLS_Pos) /*!< 0x0000000E */
6111 #define PWR_CR2_PLS_0 (0x1UL << PWR_CR2_PLS_Pos) /*!< 0x00000002 */
6112 #define PWR_CR2_PLS_1 (0x2UL << PWR_CR2_PLS_Pos) /*!< 0x00000004 */
6113 #define PWR_CR2_PLS_2 (0x4UL << PWR_CR2_PLS_Pos) /*!< 0x00000008 */
Dstm32wl55xx.h6108 #define PWR_CR2_PLS_Pos (1U) macro
6109 #define PWR_CR2_PLS_Msk (0x7UL << PWR_CR2_PLS_Pos) /*!< 0x0000000E */
6111 #define PWR_CR2_PLS_0 (0x1UL << PWR_CR2_PLS_Pos) /*!< 0x00000002 */
6112 #define PWR_CR2_PLS_1 (0x2UL << PWR_CR2_PLS_Pos) /*!< 0x00000004 */
6113 #define PWR_CR2_PLS_2 (0x4UL << PWR_CR2_PLS_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h4389 #define PWR_CR2_PLS_Pos (1U) macro
4390 #define PWR_CR2_PLS_Msk (0x7UL << PWR_CR2_PLS_Pos) /*!< 0x0000000E */
4392 #define PWR_CR2_PLS_0 (0x1UL << PWR_CR2_PLS_Pos) /*!< 0x00000002 */
4393 #define PWR_CR2_PLS_1 (0x2UL << PWR_CR2_PLS_Pos) /*!< 0x00000004 */
4394 #define PWR_CR2_PLS_2 (0x4UL << PWR_CR2_PLS_Pos) /*!< 0x00000008 */
Dstm32u083xx.h5046 #define PWR_CR2_PLS_Pos (1U) macro
5047 #define PWR_CR2_PLS_Msk (0x7UL << PWR_CR2_PLS_Pos) /*!< 0x0000000E */
5049 #define PWR_CR2_PLS_0 (0x1UL << PWR_CR2_PLS_Pos) /*!< 0x00000002 */
5050 #define PWR_CR2_PLS_1 (0x2UL << PWR_CR2_PLS_Pos) /*!< 0x00000004 */
5051 #define PWR_CR2_PLS_2 (0x4UL << PWR_CR2_PLS_Pos) /*!< 0x00000008 */
Dstm32u073xx.h4788 #define PWR_CR2_PLS_Pos (1U) macro
4789 #define PWR_CR2_PLS_Msk (0x7UL << PWR_CR2_PLS_Pos) /*!< 0x0000000E */
4791 #define PWR_CR2_PLS_0 (0x1UL << PWR_CR2_PLS_Pos) /*!< 0x00000002 */
4792 #define PWR_CR2_PLS_1 (0x2UL << PWR_CR2_PLS_Pos) /*!< 0x00000004 */
4793 #define PWR_CR2_PLS_2 (0x4UL << PWR_CR2_PLS_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb50xx.h5861 #define PWR_CR2_PLS_Pos (1U) macro
5862 #define PWR_CR2_PLS_Msk (0x7UL << PWR_CR2_PLS_Pos) /*!< 0x0000000E */
5864 #define PWR_CR2_PLS_0 (0x1U << PWR_CR2_PLS_Pos) /*!< 0x00000002 */
5865 #define PWR_CR2_PLS_1 (0x2U << PWR_CR2_PLS_Pos) /*!< 0x00000004 */
5866 #define PWR_CR2_PLS_2 (0x4U << PWR_CR2_PLS_Pos) /*!< 0x00000008 */
Dstm32wb1mxx.h5518 #define PWR_CR2_PLS_Pos (1U) macro
5519 #define PWR_CR2_PLS_Msk (0x7UL << PWR_CR2_PLS_Pos) /*!< 0x0000000E */
5521 #define PWR_CR2_PLS_0 (0x1U << PWR_CR2_PLS_Pos) /*!< 0x00000002 */
5522 #define PWR_CR2_PLS_1 (0x2U << PWR_CR2_PLS_Pos) /*!< 0x00000004 */
5523 #define PWR_CR2_PLS_2 (0x4U << PWR_CR2_PLS_Pos) /*!< 0x00000008 */
Dstm32wb30xx.h5860 #define PWR_CR2_PLS_Pos (1U) macro
5861 #define PWR_CR2_PLS_Msk (0x7UL << PWR_CR2_PLS_Pos) /*!< 0x0000000E */
5863 #define PWR_CR2_PLS_0 (0x1U << PWR_CR2_PLS_Pos) /*!< 0x00000002 */
5864 #define PWR_CR2_PLS_1 (0x2U << PWR_CR2_PLS_Pos) /*!< 0x00000004 */
5865 #define PWR_CR2_PLS_2 (0x4U << PWR_CR2_PLS_Pos) /*!< 0x00000008 */
Dstm32wb35xx.h6244 #define PWR_CR2_PLS_Pos (1U) macro
6245 #define PWR_CR2_PLS_Msk (0x7UL << PWR_CR2_PLS_Pos) /*!< 0x0000000E */
6247 #define PWR_CR2_PLS_0 (0x1U << PWR_CR2_PLS_Pos) /*!< 0x00000002 */
6248 #define PWR_CR2_PLS_1 (0x2U << PWR_CR2_PLS_Pos) /*!< 0x00000004 */
6249 #define PWR_CR2_PLS_2 (0x4U << PWR_CR2_PLS_Pos) /*!< 0x00000008 */
Dstm32wb55xx.h6296 #define PWR_CR2_PLS_Pos (1U) macro
6297 #define PWR_CR2_PLS_Msk (0x7UL << PWR_CR2_PLS_Pos) /*!< 0x0000000E */
6299 #define PWR_CR2_PLS_0 (0x1U << PWR_CR2_PLS_Pos) /*!< 0x00000002 */
6300 #define PWR_CR2_PLS_1 (0x2U << PWR_CR2_PLS_Pos) /*!< 0x00000004 */
6301 #define PWR_CR2_PLS_2 (0x4U << PWR_CR2_PLS_Pos) /*!< 0x00000008 */
Dstm32wb5mxx.h6296 #define PWR_CR2_PLS_Pos (1U) macro
6297 #define PWR_CR2_PLS_Msk (0x7UL << PWR_CR2_PLS_Pos) /*!< 0x0000000E */
6299 #define PWR_CR2_PLS_0 (0x1U << PWR_CR2_PLS_Pos) /*!< 0x00000002 */
6300 #define PWR_CR2_PLS_1 (0x2U << PWR_CR2_PLS_Pos) /*!< 0x00000004 */
6301 #define PWR_CR2_PLS_2 (0x4U << PWR_CR2_PLS_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h5422 #define PWR_CR2_PLS_Pos (1U) macro
5423 #define PWR_CR2_PLS_Msk (0x7UL << PWR_CR2_PLS_Pos) /*!< 0x0000000E */
5425 #define PWR_CR2_PLS_0 (0x1U << PWR_CR2_PLS_Pos) /*!< 0x00000002 */
5426 #define PWR_CR2_PLS_1 (0x2U << PWR_CR2_PLS_Pos) /*!< 0x00000004 */
5427 #define PWR_CR2_PLS_2 (0x4U << PWR_CR2_PLS_Pos) /*!< 0x00000008 */
Dstm32wb15xx.h5518 #define PWR_CR2_PLS_Pos (1U) macro
5519 #define PWR_CR2_PLS_Msk (0x7UL << PWR_CR2_PLS_Pos) /*!< 0x0000000E */
5521 #define PWR_CR2_PLS_0 (0x1U << PWR_CR2_PLS_Pos) /*!< 0x00000002 */
5522 #define PWR_CR2_PLS_1 (0x2U << PWR_CR2_PLS_Pos) /*!< 0x00000004 */
5523 #define PWR_CR2_PLS_2 (0x4U << PWR_CR2_PLS_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h10065 #define PWR_CR2_PLS_Pos (1U) macro
10066 #define PWR_CR2_PLS_Msk (0x7UL << PWR_CR2_PLS_Pos) /*!< 0x0000000E */
10068 #define PWR_CR2_PLS_0 (0x1UL << PWR_CR2_PLS_Pos) /*!< 0x00000002 */
10069 #define PWR_CR2_PLS_1 (0x2UL << PWR_CR2_PLS_Pos) /*!< 0x00000004 */
10070 #define PWR_CR2_PLS_2 (0x4UL << PWR_CR2_PLS_Pos) /*!< 0x00000008 */
Dstm32l562xx.h10768 #define PWR_CR2_PLS_Pos (1U) macro
10769 #define PWR_CR2_PLS_Msk (0x7UL << PWR_CR2_PLS_Pos) /*!< 0x0000000E */
10771 #define PWR_CR2_PLS_0 (0x1UL << PWR_CR2_PLS_Pos) /*!< 0x00000002 */
10772 #define PWR_CR2_PLS_1 (0x2UL << PWR_CR2_PLS_Pos) /*!< 0x00000004 */
10773 #define PWR_CR2_PLS_2 (0x4UL << PWR_CR2_PLS_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h6330 #define PWR_CR2_PLS_Pos (1U) macro
6331 #define PWR_CR2_PLS_Msk (0x7UL << PWR_CR2_PLS_Pos) /*!< 0x0000000E */
Dstm32g411xc.h6495 #define PWR_CR2_PLS_Pos (1U) macro
6496 #define PWR_CR2_PLS_Msk (0x7UL << PWR_CR2_PLS_Pos) /*!< 0x0000000E */
Dstm32g441xx.h6678 #define PWR_CR2_PLS_Pos (1U) macro
6679 #define PWR_CR2_PLS_Msk (0x7UL << PWR_CR2_PLS_Pos) /*!< 0x0000000E */
Dstm32gbk1cb.h6443 #define PWR_CR2_PLS_Pos (1U) macro
6444 #define PWR_CR2_PLS_Msk (0x7UL << PWR_CR2_PLS_Pos) /*!< 0x0000000E */
Dstm32g431xx.h6457 #define PWR_CR2_PLS_Pos (1U) macro
6458 #define PWR_CR2_PLS_Msk (0x7UL << PWR_CR2_PLS_Pos) /*!< 0x0000000E */
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h5017 #define PWR_CR2_PLS_Pos (1U) macro
5018 #define PWR_CR2_PLS_Msk (0x7UL << PWR_CR2_PLS_Pos) /*!< 0x0000000E */
Dstm32l412xx.h4801 #define PWR_CR2_PLS_Pos (1U) macro
4802 #define PWR_CR2_PLS_Msk (0x7UL << PWR_CR2_PLS_Pos) /*!< 0x0000000E */

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