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Searched refs:PWR_CR2_PLS_LEV0 (Results 1 – 25 of 46) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_pwr.h71 #define PWR_PVDLEVEL_0 PWR_CR2_PLS_LEV0 /*!< PVD threshold around 2.0 V */
Dstm32l4xx_ll_pwr.h145 #define LL_PWR_PVDLEVEL_0 (PWR_CR2_PLS_LEV0) /* VPVD0 around 2.0 V */
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_hal_pwr.h71 #define PWR_PVDLEVEL_0 PWR_CR2_PLS_LEV0 /*!< PVD threshold around 2.0 V */
Dstm32g4xx_ll_pwr.h141 #define LL_PWR_PVDLEVEL_0 (PWR_CR2_PLS_LEV0) /* VPVD0 around 2.0 V */
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_pwr.h70 #define PWR_PVDLEVEL_0 PWR_CR2_PLS_LEV0 /*!< PVD threshold around 2.0 V */
Dstm32l5xx_ll_pwr.h128 #define LL_PWR_PVDLEVEL_0 (PWR_CR2_PLS_LEV0) /* VPVD0 around 2.0 V */
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h6333 #define PWR_CR2_PLS_LEV0 (0x00000000U) /*!< PVD level 0 */ macro
Dstm32g411xc.h6498 #define PWR_CR2_PLS_LEV0 (0x00000000U) /*!< PVD level 0 */ macro
Dstm32g441xx.h6681 #define PWR_CR2_PLS_LEV0 (0x00000000U) /*!< PVD level 0 */ macro
Dstm32gbk1cb.h6446 #define PWR_CR2_PLS_LEV0 (0x00000000U) /*!< PVD level 0 */ macro
Dstm32g431xx.h6460 #define PWR_CR2_PLS_LEV0 (0x00000000U) /*!< PVD level 0 */ macro
Dstm32g4a1xx.h6845 #define PWR_CR2_PLS_LEV0 (0x00000000U) /*!< PVD level 0 */ macro
Dstm32g491xx.h6624 #define PWR_CR2_PLS_LEV0 (0x00000000U) /*!< PVD level 0 */ macro
Dstm32g473xx.h7209 #define PWR_CR2_PLS_LEV0 (0x00000000U) /*!< PVD level 0 */ macro
Dstm32g471xx.h6695 #define PWR_CR2_PLS_LEV0 (0x00000000U) /*!< PVD level 0 */ macro
Dstm32g483xx.h7430 #define PWR_CR2_PLS_LEV0 (0x00000000U) /*!< PVD level 0 */ macro
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h5020 #define PWR_CR2_PLS_LEV0 (0x00000000UL) /*!< PVD level 0 */ macro
Dstm32l412xx.h4804 #define PWR_CR2_PLS_LEV0 (0x00000000UL) /*!< PVD level 0 */ macro
Dstm32l433xx.h8585 #define PWR_CR2_PLS_LEV0 (0x00000000UL) /*!< PVD level 0 */ macro
Dstm32l451xx.h8753 #define PWR_CR2_PLS_LEV0 (0x00000000UL) /*!< PVD level 0 */ macro
Dstm32l442xx.h8721 #define PWR_CR2_PLS_LEV0 (0x00000000UL) /*!< PVD level 0 */ macro
Dstm32l431xx.h8496 #define PWR_CR2_PLS_LEV0 (0x00000000UL) /*!< PVD level 0 */ macro
Dstm32l432xx.h8505 #define PWR_CR2_PLS_LEV0 (0x00000000UL) /*!< PVD level 0 */ macro
Dstm32l443xx.h8801 #define PWR_CR2_PLS_LEV0 (0x00000000UL) /*!< PVD level 0 */ macro
Dstm32l471xx.h9457 #define PWR_CR2_PLS_LEV0 (0x00000000UL) /*!< PVD level 0 */ macro

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