Searched refs:OPAMP_TCMR_VPSSEL_Pos (Results 1 – 12 of 12) sorted by relevance
6257 #define OPAMP_TCMR_VPSSEL_Pos (1U) macro6258 #define OPAMP_TCMR_VPSSEL_Msk (0x3UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000006 */6260 #define OPAMP_TCMR_VPSSEL_0 (0x1UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000002 */6261 #define OPAMP_TCMR_VPSSEL_1 (0x2UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000004 */
6422 #define OPAMP_TCMR_VPSSEL_Pos (1U) macro6423 #define OPAMP_TCMR_VPSSEL_Msk (0x3UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000006 */6425 #define OPAMP_TCMR_VPSSEL_0 (0x1UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000002 */6426 #define OPAMP_TCMR_VPSSEL_1 (0x2UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000004 */
6605 #define OPAMP_TCMR_VPSSEL_Pos (1U) macro6606 #define OPAMP_TCMR_VPSSEL_Msk (0x3UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000006 */6608 #define OPAMP_TCMR_VPSSEL_0 (0x1UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000002 */6609 #define OPAMP_TCMR_VPSSEL_1 (0x2UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000004 */
6370 #define OPAMP_TCMR_VPSSEL_Pos (1U) macro6371 #define OPAMP_TCMR_VPSSEL_Msk (0x3UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000006 */6373 #define OPAMP_TCMR_VPSSEL_0 (0x1UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000002 */6374 #define OPAMP_TCMR_VPSSEL_1 (0x2UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000004 */
6384 #define OPAMP_TCMR_VPSSEL_Pos (1U) macro6385 #define OPAMP_TCMR_VPSSEL_Msk (0x3UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000006 */6387 #define OPAMP_TCMR_VPSSEL_0 (0x1UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000002 */6388 #define OPAMP_TCMR_VPSSEL_1 (0x2UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000004 */
6769 #define OPAMP_TCMR_VPSSEL_Pos (1U) macro6770 #define OPAMP_TCMR_VPSSEL_Msk (0x3UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000006 */6772 #define OPAMP_TCMR_VPSSEL_0 (0x1UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000002 */6773 #define OPAMP_TCMR_VPSSEL_1 (0x2UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000004 */
6548 #define OPAMP_TCMR_VPSSEL_Pos (1U) macro6549 #define OPAMP_TCMR_VPSSEL_Msk (0x3UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000006 */6551 #define OPAMP_TCMR_VPSSEL_0 (0x1UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000002 */6552 #define OPAMP_TCMR_VPSSEL_1 (0x2UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000004 */
7133 #define OPAMP_TCMR_VPSSEL_Pos (1U) macro7134 #define OPAMP_TCMR_VPSSEL_Msk (0x3UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000006 */7136 #define OPAMP_TCMR_VPSSEL_0 (0x1UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000002 */7137 #define OPAMP_TCMR_VPSSEL_1 (0x2UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000004 */
6619 #define OPAMP_TCMR_VPSSEL_Pos (1U) macro6620 #define OPAMP_TCMR_VPSSEL_Msk (0x3UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000006 */6622 #define OPAMP_TCMR_VPSSEL_0 (0x1UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000002 */6623 #define OPAMP_TCMR_VPSSEL_1 (0x2UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000004 */
7354 #define OPAMP_TCMR_VPSSEL_Pos (1U) macro7355 #define OPAMP_TCMR_VPSSEL_Msk (0x3UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000006 */7357 #define OPAMP_TCMR_VPSSEL_0 (0x1UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000002 */7358 #define OPAMP_TCMR_VPSSEL_1 (0x2UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000004 */
10703 #define OPAMP_TCMR_VPSSEL_Pos (1U) macro10704 #define OPAMP_TCMR_VPSSEL_Msk (0x3UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000006 */10706 #define OPAMP_TCMR_VPSSEL_0 (0x1UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000002 */10707 #define OPAMP_TCMR_VPSSEL_1 (0x2UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000004 */
10924 #define OPAMP_TCMR_VPSSEL_Pos (1U) macro10925 #define OPAMP_TCMR_VPSSEL_Msk (0x3UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000006 */10927 #define OPAMP_TCMR_VPSSEL_0 (0x1UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000002 */10928 #define OPAMP_TCMR_VPSSEL_1 (0x2UL << OPAMP_TCMR_VPSSEL_Pos) /*!< 0x00000004 */
