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Searched refs:OPAMP_CSR_VPSSEL_Pos (Results 1 – 13 of 13) sorted by relevance

/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_opamp.h183 #define LL_OPAMP_INPUT_NONINVERT_IO0_SEC (LL_OPAMP_INPUT_NONINVERT_IO0 << (OPAMP_CSR_VPSSEL_Pos
184 #define LL_OPAMP_INPUT_NONINVERT_IO1_SEC (LL_OPAMP_INPUT_NONINVERT_IO1 << (OPAMP_CSR_VPSSEL_Pos
185 #define LL_OPAMP_INPUT_NONINVERT_IO2_SEC (LL_OPAMP_INPUT_NONINVERT_IO2 << (OPAMP_CSR_VPSSEL_Pos
186 #define LL_OPAMP_INPUT_NONINVERT_IO3_SEC (LL_OPAMP_INPUT_NONINVERT_IO3 << (OPAMP_CSR_VPSSEL_Pos
187 #define LL_OPAMP_INPUT_NONINV_DAC1_CH1_SEC (LL_OPAMP_INPUT_NONINV_DAC1_CH1 << (OPAMP_CSR_VPSSEL_Pos
188 #define LL_OPAMP_INPUT_NONINV_DAC1_CH2_SEC (LL_OPAMP_INPUT_NONINV_DAC1_CH2 << (OPAMP_CSR_VPSSEL_Pos
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h2275 #define OPAMP_CSR_VPSSEL_Pos (9U) macro
2276 #define OPAMP_CSR_VPSSEL_Msk (0x3UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000600 */
2278 #define OPAMP_CSR_VPSSEL_0 (0x1UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000200 */
2279 #define OPAMP_CSR_VPSSEL_1 (0x2UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000400 */
Dstm32f318xx.h2276 #define OPAMP_CSR_VPSSEL_Pos (9U) macro
2277 #define OPAMP_CSR_VPSSEL_Msk (0x3UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000600 */
2279 #define OPAMP_CSR_VPSSEL_0 (0x1UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000200 */
2280 #define OPAMP_CSR_VPSSEL_1 (0x2UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000400 */
Dstm32f302x8.h2384 #define OPAMP_CSR_VPSSEL_Pos (9U) macro
2385 #define OPAMP_CSR_VPSSEL_Msk (0x3UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000600 */
2387 #define OPAMP_CSR_VPSSEL_0 (0x1UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000200 */
2388 #define OPAMP_CSR_VPSSEL_1 (0x2UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000400 */
Dstm32f328xx.h2328 #define OPAMP_CSR_VPSSEL_Pos (9U) macro
2329 #define OPAMP_CSR_VPSSEL_Msk (0x3UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000600 */
2331 #define OPAMP_CSR_VPSSEL_0 (0x1UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000200 */
2332 #define OPAMP_CSR_VPSSEL_1 (0x2UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000400 */
Dstm32f302xc.h2579 #define OPAMP_CSR_VPSSEL_Pos (9U) macro
2580 #define OPAMP_CSR_VPSSEL_Msk (0x3UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000600 */
2582 #define OPAMP_CSR_VPSSEL_0 (0x1UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000200 */
2583 #define OPAMP_CSR_VPSSEL_1 (0x2UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000400 */
Dstm32f303x8.h2329 #define OPAMP_CSR_VPSSEL_Pos (9U) macro
2330 #define OPAMP_CSR_VPSSEL_Msk (0x3UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000600 */
2332 #define OPAMP_CSR_VPSSEL_0 (0x1UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000200 */
2333 #define OPAMP_CSR_VPSSEL_1 (0x2UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000400 */
Dstm32f358xx.h2989 #define OPAMP_CSR_VPSSEL_Pos (9U) macro
2990 #define OPAMP_CSR_VPSSEL_Msk (0x3UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000600 */
2992 #define OPAMP_CSR_VPSSEL_0 (0x1UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000200 */
2993 #define OPAMP_CSR_VPSSEL_1 (0x2UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000400 */
Dstm32f303xc.h3031 #define OPAMP_CSR_VPSSEL_Pos (9U) macro
3032 #define OPAMP_CSR_VPSSEL_Msk (0x3UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000600 */
3034 #define OPAMP_CSR_VPSSEL_0 (0x1UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000200 */
3035 #define OPAMP_CSR_VPSSEL_1 (0x2UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000400 */
Dstm32f302xe.h2602 #define OPAMP_CSR_VPSSEL_Pos (9U) macro
2603 #define OPAMP_CSR_VPSSEL_Msk (0x3UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000600 */
2605 #define OPAMP_CSR_VPSSEL_0 (0x1UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000200 */
2606 #define OPAMP_CSR_VPSSEL_1 (0x2UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000400 */
Dstm32f303xe.h3029 #define OPAMP_CSR_VPSSEL_Pos (9U) macro
3030 #define OPAMP_CSR_VPSSEL_Msk (0x3UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000600 */
3032 #define OPAMP_CSR_VPSSEL_0 (0x1UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000200 */
3033 #define OPAMP_CSR_VPSSEL_1 (0x2UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000400 */
Dstm32f398xx.h2985 #define OPAMP_CSR_VPSSEL_Pos (9U) macro
2986 #define OPAMP_CSR_VPSSEL_Msk (0x3UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000600 */
2988 #define OPAMP_CSR_VPSSEL_0 (0x1UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000200 */
2989 #define OPAMP_CSR_VPSSEL_1 (0x2UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000400 */
Dstm32f334x8.h2514 #define OPAMP_CSR_VPSSEL_Pos (9U) macro
2515 #define OPAMP_CSR_VPSSEL_Msk (0x3UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000600 */
2517 #define OPAMP_CSR_VPSSEL_0 (0x1UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000200 */
2518 #define OPAMP_CSR_VPSSEL_1 (0x2UL << OPAMP_CSR_VPSSEL_Pos) /*!< 0x00000400 */