Searched refs:OPAMP2_CSR_VPSSEL_Pos (Results 1 – 12 of 12) sorted by relevance
2213 #define OPAMP2_CSR_VPSSEL_Pos (9U) macro2214 #define OPAMP2_CSR_VPSSEL_Msk (0x3UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000600 */2216 #define OPAMP2_CSR_VPSSEL_0 (0x1UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000200 */2217 #define OPAMP2_CSR_VPSSEL_1 (0x2UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000400 */
2214 #define OPAMP2_CSR_VPSSEL_Pos (9U) macro2215 #define OPAMP2_CSR_VPSSEL_Msk (0x3UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000600 */2217 #define OPAMP2_CSR_VPSSEL_0 (0x1UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000200 */2218 #define OPAMP2_CSR_VPSSEL_1 (0x2UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000400 */
2322 #define OPAMP2_CSR_VPSSEL_Pos (9U) macro2323 #define OPAMP2_CSR_VPSSEL_Msk (0x3UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000600 */2325 #define OPAMP2_CSR_VPSSEL_0 (0x1UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000200 */2326 #define OPAMP2_CSR_VPSSEL_1 (0x2UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000400 */
2266 #define OPAMP2_CSR_VPSSEL_Pos (9U) macro2267 #define OPAMP2_CSR_VPSSEL_Msk (0x3UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000600 */2269 #define OPAMP2_CSR_VPSSEL_0 (0x1UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000200 */2270 #define OPAMP2_CSR_VPSSEL_1 (0x2UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000400 */
2517 #define OPAMP2_CSR_VPSSEL_Pos (9U) macro2518 #define OPAMP2_CSR_VPSSEL_Msk (0x3UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000600 */2520 #define OPAMP2_CSR_VPSSEL_0 (0x1UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000200 */2521 #define OPAMP2_CSR_VPSSEL_1 (0x2UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000400 */
2267 #define OPAMP2_CSR_VPSSEL_Pos (9U) macro2268 #define OPAMP2_CSR_VPSSEL_Msk (0x3UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000600 */2270 #define OPAMP2_CSR_VPSSEL_0 (0x1UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000200 */2271 #define OPAMP2_CSR_VPSSEL_1 (0x2UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000400 */
2803 #define OPAMP2_CSR_VPSSEL_Pos (9U) macro2804 #define OPAMP2_CSR_VPSSEL_Msk (0x3UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000600 */2806 #define OPAMP2_CSR_VPSSEL_0 (0x1UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000200 */2807 #define OPAMP2_CSR_VPSSEL_1 (0x2UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000400 */
2845 #define OPAMP2_CSR_VPSSEL_Pos (9U) macro2846 #define OPAMP2_CSR_VPSSEL_Msk (0x3UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000600 */2848 #define OPAMP2_CSR_VPSSEL_0 (0x1UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000200 */2849 #define OPAMP2_CSR_VPSSEL_1 (0x2UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000400 */
2540 #define OPAMP2_CSR_VPSSEL_Pos (9U) macro2541 #define OPAMP2_CSR_VPSSEL_Msk (0x3UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000600 */2543 #define OPAMP2_CSR_VPSSEL_0 (0x1UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000200 */2544 #define OPAMP2_CSR_VPSSEL_1 (0x2UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000400 */
2843 #define OPAMP2_CSR_VPSSEL_Pos (9U) macro2844 #define OPAMP2_CSR_VPSSEL_Msk (0x3UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000600 */2846 #define OPAMP2_CSR_VPSSEL_0 (0x1UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000200 */2847 #define OPAMP2_CSR_VPSSEL_1 (0x2UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000400 */
2799 #define OPAMP2_CSR_VPSSEL_Pos (9U) macro2800 #define OPAMP2_CSR_VPSSEL_Msk (0x3UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000600 */2802 #define OPAMP2_CSR_VPSSEL_0 (0x1UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000200 */2803 #define OPAMP2_CSR_VPSSEL_1 (0x2UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000400 */
2452 #define OPAMP2_CSR_VPSSEL_Pos (9U) macro2453 #define OPAMP2_CSR_VPSSEL_Msk (0x3UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000600 */2455 #define OPAMP2_CSR_VPSSEL_0 (0x1UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000200 */2456 #define OPAMP2_CSR_VPSSEL_1 (0x2UL << OPAMP2_CSR_VPSSEL_Pos) /*!< 0x00000400 */
