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Searched refs:LPTIM_CCMR1_IC2PSC_Pos (Results 1 – 25 of 40) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h4929 #define LPTIM_CCMR1_IC2PSC_Pos (24U) macro
4930 #define LPTIM_CCMR1_IC2PSC_Msk (0x3UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x03000000…
4932 #define LPTIM_CCMR1_IC2PSC_0 (0x1UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x01000000…
4933 #define LPTIM_CCMR1_IC2PSC_1 (0x2UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x02000000…
Dstm32wba52xx.h8530 #define LPTIM_CCMR1_IC2PSC_Pos (24U) macro
8531 #define LPTIM_CCMR1_IC2PSC_Msk (0x3UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x03000000…
8533 #define LPTIM_CCMR1_IC2PSC_0 (0x1UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x01000000…
8534 #define LPTIM_CCMR1_IC2PSC_1 (0x2UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x02000000…
Dstm32wba54xx.h8764 #define LPTIM_CCMR1_IC2PSC_Pos (24U) macro
8765 #define LPTIM_CCMR1_IC2PSC_Msk (0x3UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x03000000…
8767 #define LPTIM_CCMR1_IC2PSC_0 (0x1UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x01000000…
8768 #define LPTIM_CCMR1_IC2PSC_1 (0x2UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x02000000…
Dstm32wba5mxx.h8764 #define LPTIM_CCMR1_IC2PSC_Pos (24U) macro
8765 #define LPTIM_CCMR1_IC2PSC_Msk (0x3UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x03000000…
8767 #define LPTIM_CCMR1_IC2PSC_0 (0x1UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x01000000…
8768 #define LPTIM_CCMR1_IC2PSC_1 (0x2UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x02000000…
Dstm32wba55xx.h8764 #define LPTIM_CCMR1_IC2PSC_Pos (24U) macro
8765 #define LPTIM_CCMR1_IC2PSC_Msk (0x3UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x03000000…
8767 #define LPTIM_CCMR1_IC2PSC_0 (0x1UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x01000000…
8768 #define LPTIM_CCMR1_IC2PSC_1 (0x2UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x02000000…
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h8305 #define LPTIM_CCMR1_IC2PSC_Pos (24U) macro
8306 #define LPTIM_CCMR1_IC2PSC_Msk (0x3UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x03000000 */
8308 #define LPTIM_CCMR1_IC2PSC_0 (0x1UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x01000000 */
8309 #define LPTIM_CCMR1_IC2PSC_1 (0x2UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x02000000 */
Dstm32u083xx.h9242 #define LPTIM_CCMR1_IC2PSC_Pos (24U) macro
9243 #define LPTIM_CCMR1_IC2PSC_Msk (0x3UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x03000000 */
9245 #define LPTIM_CCMR1_IC2PSC_0 (0x1UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x01000000 */
9246 #define LPTIM_CCMR1_IC2PSC_1 (0x2UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x02000000 */
Dstm32u073xx.h8972 #define LPTIM_CCMR1_IC2PSC_Pos (24U) macro
8973 #define LPTIM_CCMR1_IC2PSC_Msk (0x3UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x03000000 */
8975 #define LPTIM_CCMR1_IC2PSC_0 (0x1UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x01000000 */
8976 #define LPTIM_CCMR1_IC2PSC_1 (0x2UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x02000000 */
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_lptim.c3682 tmpccmr1 |= (sConfig->ICPrescaler << (LPTIM_CCMR1_IC2PSC_Pos - LPTIM_CCMR1_IC1PSC_Pos)) | in LPTIM_IC2_SetConfig()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_lptim.c3680 tmpccmr1 |= (sConfig->ICPrescaler << (LPTIM_CCMR1_IC2PSC_Pos - LPTIM_CCMR1_IC1PSC_Pos)) | in LPTIM_IC2_SetConfig()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_lptim.c3652 tmpccmr1 |= (sConfig->ICPrescaler << (LPTIM_CCMR1_IC2PSC_Pos - LPTIM_CCMR1_IC1PSC_Pos)) | in LPTIM_IC2_SetConfig()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_lptim.c3712 tmpccmr1 |= (sConfig->ICPrescaler << (LPTIM_CCMR1_IC2PSC_Pos - LPTIM_CCMR1_IC1PSC_Pos)) | in LPTIM_IC2_SetConfig()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_lptim.c3712 tmpccmr1 |= (sConfig->ICPrescaler << (LPTIM_CCMR1_IC2PSC_Pos - LPTIM_CCMR1_IC1PSC_Pos)) | in LPTIM_IC2_SetConfig()
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/src/
Dstm32u0xx_hal_lptim.c4186 tmpccmr1 |= (sConfig->ICPrescaler << (LPTIM_CCMR1_IC2PSC_Pos - LPTIM_CCMR1_IC1PSC_Pos)) | in LPTIM_IC2_SetConfig()
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h7844 #define LPTIM_CCMR1_IC2PSC_Pos (24U) macro
7845 #define LPTIM_CCMR1_IC2PSC_Msk (0x3UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x03000000…
7847 #define LPTIM_CCMR1_IC2PSC_0 (0x1UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x01000000…
7848 #define LPTIM_CCMR1_IC2PSC_1 (0x2UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x02000000…
Dstm32h523xx.h10283 #define LPTIM_CCMR1_IC2PSC_Pos (24U) macro
10284 #define LPTIM_CCMR1_IC2PSC_Msk (0x3UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x03000000…
10286 #define LPTIM_CCMR1_IC2PSC_0 (0x1UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x01000000…
10287 #define LPTIM_CCMR1_IC2PSC_1 (0x2UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x02000000…
Dstm32h562xx.h11009 #define LPTIM_CCMR1_IC2PSC_Pos (24U) macro
11010 #define LPTIM_CCMR1_IC2PSC_Msk (0x3UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x03000000…
11012 #define LPTIM_CCMR1_IC2PSC_0 (0x1UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x01000000…
11013 #define LPTIM_CCMR1_IC2PSC_1 (0x2UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x02000000…
Dstm32h533xx.h10692 #define LPTIM_CCMR1_IC2PSC_Pos (24U) macro
10693 #define LPTIM_CCMR1_IC2PSC_Msk (0x3UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x03000000…
10695 #define LPTIM_CCMR1_IC2PSC_0 (0x1UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x01000000…
10696 #define LPTIM_CCMR1_IC2PSC_1 (0x2UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x02000000…
Dstm32h573xx.h13502 #define LPTIM_CCMR1_IC2PSC_Pos (24U) macro
13503 #define LPTIM_CCMR1_IC2PSC_Msk (0x3UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x03000000…
13505 #define LPTIM_CCMR1_IC2PSC_0 (0x1UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x01000000…
13506 #define LPTIM_CCMR1_IC2PSC_1 (0x2UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x02000000…
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h11375 #define LPTIM_CCMR1_IC2PSC_Pos (24U) macro
11376 #define LPTIM_CCMR1_IC2PSC_Msk (0x3UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x03000000…
11378 #define LPTIM_CCMR1_IC2PSC_0 (0x1UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x01000000…
11379 #define LPTIM_CCMR1_IC2PSC_1 (0x2UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x02000000…
Dstm32u535xx.h10975 #define LPTIM_CCMR1_IC2PSC_Pos (24U) macro
10976 #define LPTIM_CCMR1_IC2PSC_Msk (0x3UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x03000000…
10978 #define LPTIM_CCMR1_IC2PSC_0 (0x1UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x01000000…
10979 #define LPTIM_CCMR1_IC2PSC_1 (0x2UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x02000000…
Dstm32u575xx.h12010 #define LPTIM_CCMR1_IC2PSC_Pos (24U) macro
12011 #define LPTIM_CCMR1_IC2PSC_Msk (0x3UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x03000000…
12013 #define LPTIM_CCMR1_IC2PSC_0 (0x1UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x01000000…
12014 #define LPTIM_CCMR1_IC2PSC_1 (0x2UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x02000000…
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h12778 #define LPTIM_CCMR1_IC2PSC_Pos (24U) macro
12779 #define LPTIM_CCMR1_IC2PSC_Msk (0x3UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x03000000 */
12781 #define LPTIM_CCMR1_IC2PSC_0 (0x1UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x01000000 */
12782 #define LPTIM_CCMR1_IC2PSC_1 (0x2UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x02000000 */
Dstm32h7s7xx.h13367 #define LPTIM_CCMR1_IC2PSC_Pos (24U) macro
13368 #define LPTIM_CCMR1_IC2PSC_Msk (0x3UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x03000000 */
13370 #define LPTIM_CCMR1_IC2PSC_0 (0x1UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x01000000 */
13371 #define LPTIM_CCMR1_IC2PSC_1 (0x2UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x02000000 */
Dstm32h7s3xx.h13223 #define LPTIM_CCMR1_IC2PSC_Pos (24U) macro
13224 #define LPTIM_CCMR1_IC2PSC_Msk (0x3UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x03000000 */
13226 #define LPTIM_CCMR1_IC2PSC_0 (0x1UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x01000000 */
13227 #define LPTIM_CCMR1_IC2PSC_1 (0x2UL << LPTIM_CCMR1_IC2PSC_Pos) /*!< 0x02000000 */

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