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Searched refs:LPTIM_CCMR1_IC1PSC_Pos (Results 1 – 25 of 40) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h4908 #define LPTIM_CCMR1_IC1PSC_Pos (8U) macro
4909 #define LPTIM_CCMR1_IC1PSC_Msk (0x3UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000300…
4911 #define LPTIM_CCMR1_IC1PSC_0 (0x1UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000100…
4912 #define LPTIM_CCMR1_IC1PSC_1 (0x2UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000200…
Dstm32wba52xx.h8509 #define LPTIM_CCMR1_IC1PSC_Pos (8U) macro
8510 #define LPTIM_CCMR1_IC1PSC_Msk (0x3UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000300…
8512 #define LPTIM_CCMR1_IC1PSC_0 (0x1UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000100…
8513 #define LPTIM_CCMR1_IC1PSC_1 (0x2UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000200…
Dstm32wba54xx.h8743 #define LPTIM_CCMR1_IC1PSC_Pos (8U) macro
8744 #define LPTIM_CCMR1_IC1PSC_Msk (0x3UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000300…
8746 #define LPTIM_CCMR1_IC1PSC_0 (0x1UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000100…
8747 #define LPTIM_CCMR1_IC1PSC_1 (0x2UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000200…
Dstm32wba5mxx.h8743 #define LPTIM_CCMR1_IC1PSC_Pos (8U) macro
8744 #define LPTIM_CCMR1_IC1PSC_Msk (0x3UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000300…
8746 #define LPTIM_CCMR1_IC1PSC_0 (0x1UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000100…
8747 #define LPTIM_CCMR1_IC1PSC_1 (0x2UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000200…
Dstm32wba55xx.h8743 #define LPTIM_CCMR1_IC1PSC_Pos (8U) macro
8744 #define LPTIM_CCMR1_IC1PSC_Msk (0x3UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000300…
8746 #define LPTIM_CCMR1_IC1PSC_0 (0x1UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000100…
8747 #define LPTIM_CCMR1_IC1PSC_1 (0x2UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000200…
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h8284 #define LPTIM_CCMR1_IC1PSC_Pos (8U) macro
8285 #define LPTIM_CCMR1_IC1PSC_Msk (0x3UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000300 */
8287 #define LPTIM_CCMR1_IC1PSC_0 (0x1UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000100 */
8288 #define LPTIM_CCMR1_IC1PSC_1 (0x2UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000200 */
Dstm32u083xx.h9221 #define LPTIM_CCMR1_IC1PSC_Pos (8U) macro
9222 #define LPTIM_CCMR1_IC1PSC_Msk (0x3UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000300 */
9224 #define LPTIM_CCMR1_IC1PSC_0 (0x1UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000100 */
9225 #define LPTIM_CCMR1_IC1PSC_1 (0x2UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000200 */
Dstm32u073xx.h8951 #define LPTIM_CCMR1_IC1PSC_Pos (8U) macro
8952 #define LPTIM_CCMR1_IC1PSC_Msk (0x3UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000300 */
8954 #define LPTIM_CCMR1_IC1PSC_0 (0x1UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000100 */
8955 #define LPTIM_CCMR1_IC1PSC_1 (0x2UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000200 */
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_lptim.c3682 tmpccmr1 |= (sConfig->ICPrescaler << (LPTIM_CCMR1_IC2PSC_Pos - LPTIM_CCMR1_IC1PSC_Pos)) | in LPTIM_IC2_SetConfig()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_lptim.c3680 tmpccmr1 |= (sConfig->ICPrescaler << (LPTIM_CCMR1_IC2PSC_Pos - LPTIM_CCMR1_IC1PSC_Pos)) | in LPTIM_IC2_SetConfig()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_lptim.c3652 tmpccmr1 |= (sConfig->ICPrescaler << (LPTIM_CCMR1_IC2PSC_Pos - LPTIM_CCMR1_IC1PSC_Pos)) | in LPTIM_IC2_SetConfig()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_lptim.c3712 tmpccmr1 |= (sConfig->ICPrescaler << (LPTIM_CCMR1_IC2PSC_Pos - LPTIM_CCMR1_IC1PSC_Pos)) | in LPTIM_IC2_SetConfig()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_lptim.c3712 tmpccmr1 |= (sConfig->ICPrescaler << (LPTIM_CCMR1_IC2PSC_Pos - LPTIM_CCMR1_IC1PSC_Pos)) | in LPTIM_IC2_SetConfig()
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/src/
Dstm32u0xx_hal_lptim.c4186 tmpccmr1 |= (sConfig->ICPrescaler << (LPTIM_CCMR1_IC2PSC_Pos - LPTIM_CCMR1_IC1PSC_Pos)) | in LPTIM_IC2_SetConfig()
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h7823 #define LPTIM_CCMR1_IC1PSC_Pos (8U) macro
7824 #define LPTIM_CCMR1_IC1PSC_Msk (0x3UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000300…
7826 #define LPTIM_CCMR1_IC1PSC_0 (0x1UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000100…
7827 #define LPTIM_CCMR1_IC1PSC_1 (0x2UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000200…
Dstm32h523xx.h10262 #define LPTIM_CCMR1_IC1PSC_Pos (8U) macro
10263 #define LPTIM_CCMR1_IC1PSC_Msk (0x3UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000300…
10265 #define LPTIM_CCMR1_IC1PSC_0 (0x1UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000100…
10266 #define LPTIM_CCMR1_IC1PSC_1 (0x2UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000200…
Dstm32h562xx.h10988 #define LPTIM_CCMR1_IC1PSC_Pos (8U) macro
10989 #define LPTIM_CCMR1_IC1PSC_Msk (0x3UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000300…
10991 #define LPTIM_CCMR1_IC1PSC_0 (0x1UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000100…
10992 #define LPTIM_CCMR1_IC1PSC_1 (0x2UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000200…
Dstm32h533xx.h10671 #define LPTIM_CCMR1_IC1PSC_Pos (8U) macro
10672 #define LPTIM_CCMR1_IC1PSC_Msk (0x3UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000300…
10674 #define LPTIM_CCMR1_IC1PSC_0 (0x1UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000100…
10675 #define LPTIM_CCMR1_IC1PSC_1 (0x2UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000200…
Dstm32h573xx.h13481 #define LPTIM_CCMR1_IC1PSC_Pos (8U) macro
13482 #define LPTIM_CCMR1_IC1PSC_Msk (0x3UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000300…
13484 #define LPTIM_CCMR1_IC1PSC_0 (0x1UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000100…
13485 #define LPTIM_CCMR1_IC1PSC_1 (0x2UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000200…
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h11354 #define LPTIM_CCMR1_IC1PSC_Pos (8U) macro
11355 #define LPTIM_CCMR1_IC1PSC_Msk (0x3UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000300…
11357 #define LPTIM_CCMR1_IC1PSC_0 (0x1UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000100…
11358 #define LPTIM_CCMR1_IC1PSC_1 (0x2UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000200…
Dstm32u535xx.h10954 #define LPTIM_CCMR1_IC1PSC_Pos (8U) macro
10955 #define LPTIM_CCMR1_IC1PSC_Msk (0x3UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000300…
10957 #define LPTIM_CCMR1_IC1PSC_0 (0x1UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000100…
10958 #define LPTIM_CCMR1_IC1PSC_1 (0x2UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000200…
Dstm32u575xx.h11989 #define LPTIM_CCMR1_IC1PSC_Pos (8U) macro
11990 #define LPTIM_CCMR1_IC1PSC_Msk (0x3UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000300…
11992 #define LPTIM_CCMR1_IC1PSC_0 (0x1UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000100…
11993 #define LPTIM_CCMR1_IC1PSC_1 (0x2UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000200…
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h12757 #define LPTIM_CCMR1_IC1PSC_Pos (8U) macro
12758 #define LPTIM_CCMR1_IC1PSC_Msk (0x3UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000300 */
12760 #define LPTIM_CCMR1_IC1PSC_0 (0x1UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000100 */
12761 #define LPTIM_CCMR1_IC1PSC_1 (0x2UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000200 */
Dstm32h7s7xx.h13346 #define LPTIM_CCMR1_IC1PSC_Pos (8U) macro
13347 #define LPTIM_CCMR1_IC1PSC_Msk (0x3UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000300 */
13349 #define LPTIM_CCMR1_IC1PSC_0 (0x1UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000100 */
13350 #define LPTIM_CCMR1_IC1PSC_1 (0x2UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000200 */
Dstm32h7s3xx.h13202 #define LPTIM_CCMR1_IC1PSC_Pos (8U) macro
13203 #define LPTIM_CCMR1_IC1PSC_Msk (0x3UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000300 */
13205 #define LPTIM_CCMR1_IC1PSC_0 (0x1UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000100 */
13206 #define LPTIM_CCMR1_IC1PSC_1 (0x2UL << LPTIM_CCMR1_IC1PSC_Pos) /*!< 0x00000200 */

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